150 μ a high state per socket | Transcend Information TS32M~1GCF80

A high state.

A low state and 100

meeting all AC timing requirements: 50 pF at a DC current of 400

TS32M~1GCF8080X CompactFlash Card

5) Status Signals: the socket shall present a load to the card no larger than 50 pF 10 at a DC current of 400 A low state

and 100 A high state, including pull-up resistor. The card shall be able to drive at least the following load 10 while

meeting all AC timing requirements: 50 pF at a DC current of 400 A low state and 1100 A high state.

6) BVD2 was not defined in the JEIDA 3.0 release. Systems fully supporting JEIDA release 3 SRAM cards shall pull-up

μμ

pin 45 (BVD2) to avoid sensing their batteries as “Low.”
7) Address Signals: each card shall present a load of no more than 100pF 10 at a DC current of 450					A low state and
150 A high state. The host shall be able to drive at least the following load 10 while meeting all AC timing
requirements: (the number of sockets wired in parallel) multiplied by (100pF with DC current 450					A low state and
150μ A high state per socket).
8) Data Signals: the host and each card shall present a load no larger than 50pF 10 at a DC current of 450μ A and 150
A highμstate. The host and each card shall be able to drive at least the following load 10 while meeting all AC
	μ		μ
timing requirements: 100pF with DC current 1.6mA low state and 300			A high state. This permits the host to wire
				μ
μ		μ		μ	μ

two sockets in parallel without derating the card access speeds.

9) Reset Signal: This signal is pulled up to prevent the input from floating when a CFA to PCMCIA adapter is used in a PCMCIA revision 1 host. However, to minimize DC current drain through the pull-up resistor in normal operation the pull-up should be turned off once the Reset signal has been actively driven low by the host. Consequently, the input is specified as an I2Z because the resistor is not necessarily detectable in the input current leakage test.

Transcend Information Inc.

18

V1.1

Image 18

Transcend Information dimensions TS32M~1GCF8080X CompactFlash Card, 150 μ a high state per socket

Contents

Description Placement FeatureDimensions 80X CompactFlash Card Ordering Information CHS and Capacity Compactflash Card Specification Block Diagram PC Card Memory Mode PC Card I/O Mode True IDE Mode4 Electrical Interface Pin Assignment and Pin Type V1.1 Signal Description Signal Name Dir Pin Description Csel V1.1 Iord REG True IDE Mode As Iordy Electrical Specification Input Leakage Current Input Characteristics CompactFlash interface I/O at Parameter Symbol Min Max Unit Remark Parameter Min Max Unit Output Drive Type Output Drive Characteristics Signal Interface Signal Card Host TS32M~1GCF8080X CompactFlash Card 150 μ a high state per socket Figure Attribute Memory Read Timing Diagram Attribute Memory Read Timing Configuration Register Attribute Memory Write Timing Common Memory Read Timing Specification Cycle Time Mode 250 ns 120 ns 100 ns 80 nsMin Max Symbol Common Memory Write Timing Specification Min Symbol I/O Input Read Timing Specification 80X CompactFlash Card 10 I/O Output Write Timing Specification Cycle Time Mode 255 ns 120 ns 100 ns 80 ns True IDE PIO Mode Read/Write Timing Specification Mode V1.1 True IDE Multiword DMA Mode Read/Write Timing Specification CE2 CE1 Card ConfigurationMultiple Function CompactFlash Storage Cards A10 A8-A4 Function Mode Attribute Memory FunctionCE2 CE1 A10 D15-D8 D7-D0 Table CompactFlash Storage Card Configurations Configuration Option RegisterBase + 00h in Attribute Memory Pin Replacement Register Base + 04h in Attribute Memory Table Pin Replacement Changed Bit/Mask Bit Values Socket and Copy Register Base + 06h in Attribute Memory I/O Transfer Function Common Memory Transfer Function True IDE Mode I/O Transfer FunctionTable Pcmcia Mode I/O Function Function Code V1.1 Table I/O Configurations CF-ATA Drive Register Set Definition and Protocol I/O Primary and Secondary Address Configurations Table Primary and Secondary I/O Decoding Contiguous I/O Mapped Addressing Table Contiguous I/O Decoding Memory Mapped Addressing True IDE Mode Addressing CF-ATA RegistersData Register Address 1F0h170hOffset 0,8,9 Error Register Address 1F1h171h Offset 1, 0Dh Read Only Table Data Register Access Sector Number LBA 7-0 Register Address 1F3h173h Offset Feature Register Address 1F1h171h Offset 1, 0Dh Write OnlySector Count Register Address 1F2h172h Offset Cylinder Low LBA 15-8 Register Address 1F4h174h Offset Device Control Register Address 3F6h376h Offset Eh Figure Status & Alternate Status Register Card Drive Address Register Address 3F7h377h Offset Fh Figure Device Control Register CF-ATA Command Description CF-ATA Command Set LBA Definitions Bit Command Check Power Mode 98h or E5hExecute Drive Diagnostic 90h Cyl High Cyl Low Sec Num Sec Cnt Feature Drive Head LBA Cyl High Erase Sectors C0hFormat Track 50h Sec Num LBA Sec Cnt Word Default Total Data Field Type Information Identify Device EchBytes Total Data Field Type Information Word 3 Default Number of Heads Word 0 General ConfigurationWord 1 Default Number of Cylinders Word 6 Default Number of Sectors per Track Multiple Sector Setting Word 49 Capabilities Bit 13 Standby TimerPIO Data Transfer Cycle Timing Mode Total Sectors Addressable in LBA Mode Word 65 Minimum Multiword DMA transfer cycle time Multiword DMA transferWord 64 Advanced PIO transfer modes supported Recommended Multiword DMA transfer cycle time Words 82-84 Features/command sets supported Words 85-87 Features/command sets enabledWord 68 Minimum PIO transfer cycle time with Iordy Word 91 Advanced power management level value Word 89 Time required for Security erase unit completionWord 128 Security Status Bit 8 Security Level Word 160 Power Requirement Description Value Maximum PIO mode timing selectedAdditional Requirements for CF Advanced Timing Modes Value Current Multiword DMA timing mode selected Value Maximum Multiword DMA timing mode supportedValue Current PIO timing mode selected Value Maximum Pcmcia IO timing mode Supported Idle Immediate 95h or E1h Drive Cyl High Cyl Low Sec Num Sec Cnt FeatureIdle 97h or E3h Initialize Drive Parameters 91h Read Buffer E4h Read DMA C8h Read Multiple C4h Read Sectors 20h or 21h Read Verify Sectors 40h or 41h Recalibrate 1Xh Request Sense 03h Table Extended Error Codes Seek 7Xh Set Features EFh Table Feature Supported Set Multiple Mode C6h Set Sleep Mode- 99h or E6h Standby 96h or E2h Standby Immediate 94h or E0h Translate Sector 87hTableTranslate Sector Information Wear Level F5h Write Buffer E8hWrite DMA CAh Write Multiple Command C5h Write Multiple without Erase CDh Write Sectors 30h or 31h Write Sectors without Erase 38h Write Verify 3Ch 80X CompactFlash Card Error Posting BBK UNC Idnf Abrt Amnf Drdy DWF DSC Corr ERR Address Data Description of Contents CIS function CIS Description Address Data 5 4 Description of Contents CIS function Cistplconfig V1.1 MS IR IO RO a Address Data 5 4 3 2 1 Description of Contents CIS function Irqn LS AS NR RO a T