TS32M~1GCF8080X CompactFlash Card
5) Status Signals: the socket shall present a load to the card no larger than 50 pF 10 at a DC current of 400 A low state
and 100 A high state, including
meeting all AC timing requirements: 50 pF at a DC current of 400 A low state and 1100 A high state.
6) BVD2 was not defined in the JEIDA 3.0 release. Systems fully supporting JEIDA release 3 SRAM cards shall
μμ
pin 45 (BVD2) to avoid sensing their batteries as “Low.” |
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7) Address Signals: each card shall present a load of no more than 100pF 10 at a DC current of 450 |
| A low state and | |||
150 A high state. The host shall be able to drive at least the following load 10 while meeting all AC timing | |||||
requirements: (the number of sockets wired in parallel) multiplied by (100pF with DC current 450 | A low state and | ||||
150μ A high state per socket). |
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8) Data Signals: the host and each card shall present a load no larger than 50pF 10 at a DC current of 450μ A and 150 | |||||
A highμstate. The host and each card shall be able to drive at least the following load 10 while meeting all AC | |||||
| μ |
| μ |
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timing requirements: 100pF with DC current 1.6mA low state and 300 |
| A high state. This permits the host to wire | |||
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| μ |
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μ |
| μ |
| μ | μ |
two sockets in parallel without derating the card access speeds.
9) Reset Signal: This signal is pulled up to prevent the input from floating when a CFA to PCMCIA adapter is used in a PCMCIA revision 1 host. However, to minimize DC current drain through the
Transcend Information Inc. | 18 |
