Transcend Information TS32M~1GCF80 instruction

TS32M~1GCF80		80X CompactFlash Card

5.1 I/O Primary and Secondary Address Configurations

Table: Primary and Secondary I/O Decoding

Note:

1)Register 0 is accessed with -CE1 low and -CE2 low (and A0 = Don’t Care) as a word register on the combined Odd Data Bus and Even Data Bus (D15-D0). This register may also be accessed by a pair of byte accesses to the offset 0 with -CE1 low and -CE2 high. Note that the address space of this word register overlaps the address space of the Error and Feature byte-wide registers, which lie at offset 1. When accessed twice as byte register with -CE1 low, the first byte to be accessed is the even byte of the word and the second byte accessed is the odd byte of the equivalent word access.

2)A byte access to register 0 with -CE1 high and -CE2 low accesses the error (read) or feature (write) register.

Transcend Information Inc.

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Transcend Information TS32M~1GCF80 dimensions I/O Primary and Secondary Address Configurations

Contents

Placement Feature DimensionsDescription 80X CompactFlash Card Ordering Information CHS and Capacity Compactflash Card Specification Block Diagram PC Card Memory Mode PC Card I/O Mode True IDE Mode4 Electrical Interface Pin Assignment and Pin Type V1.1 Signal Description Signal Name Dir Pin Description Csel V1.1 Iord REG True IDE Mode As Iordy Electrical Specification Input Leakage Current Input Characteristics CompactFlash interface I/O at Parameter Symbol Min Max Unit Remark Parameter Min Max Unit Output Drive Type Output Drive Characteristics Signal Interface Signal Card Host TS32M~1GCF8080X CompactFlash Card 150 μ a high state per socket Figure Attribute Memory Read Timing Diagram Attribute Memory Read Timing Configuration Register Attribute Memory Write Timing Common Memory Read Timing Specification Cycle Time Mode 250 ns 120 ns 100 ns 80 nsMin Max Symbol Common Memory Write Timing Specification Min Symbol I/O Input Read Timing Specification 80X CompactFlash Card 10 I/O Output Write Timing Specification Cycle Time Mode 255 ns 120 ns 100 ns 80 ns True IDE PIO Mode Read/Write Timing Specification Mode V1.1 True IDE Multiword DMA Mode Read/Write Timing Specification Card Configuration Multiple Function CompactFlash Storage CardsCE2 CE1 A10 A8-A4 Function Mode Attribute Memory FunctionCE2 CE1 A10 D15-D8 D7-D0 Table CompactFlash Storage Card Configurations Configuration Option RegisterBase + 00h in Attribute Memory Pin Replacement Register Base + 04h in Attribute Memory Table Pin Replacement Changed Bit/Mask Bit Values Socket and Copy Register Base + 06h in Attribute Memory I/O Transfer Function True IDE Mode I/O Transfer Function Table Pcmcia Mode I/O FunctionCommon Memory Transfer Function Function Code V1.1 Table I/O Configurations CF-ATA Drive Register Set Definition and Protocol I/O Primary and Secondary Address Configurations Table Primary and Secondary I/O Decoding Contiguous I/O Mapped Addressing Table Contiguous I/O Decoding Memory Mapped Addressing True IDE Mode Addressing CF-ATA RegistersData Register Address 1F0h170hOffset 0,8,9 Error Register Address 1F1h171h Offset 1, 0Dh Read Only Table Data Register Access Feature Register Address 1F1h171h Offset 1, 0Dh Write Only Sector Count Register Address 1F2h172h OffsetSector Number LBA 7-0 Register Address 1F3h173h Offset Cylinder Low LBA 15-8 Register Address 1F4h174h Offset Device Control Register Address 3F6h376h Offset Eh Figure Status & Alternate Status Register Card Drive Address Register Address 3F7h377h Offset Fh Figure Device Control Register CF-ATA Command Description CF-ATA Command Set LBA Definitions Check Power Mode 98h or E5h Execute Drive Diagnostic 90hBit Command Cyl High Cyl Low Sec Num Sec Cnt Feature Erase Sectors C0h Format Track 50hDrive Head LBA Cyl High Sec Num LBA Sec Cnt Word Default Total Data Field Type Information Identify Device EchBytes Total Data Field Type Information Word 0 General Configuration Word 1 Default Number of CylindersWord 3 Default Number of Heads Word 6 Default Number of Sectors per Track Word 49 Capabilities Bit 13 Standby Timer PIO Data Transfer Cycle Timing ModeMultiple Sector Setting Total Sectors Addressable in LBA Mode Multiword DMA transfer Word 64 Advanced PIO transfer modes supportedWord 65 Minimum Multiword DMA transfer cycle time Recommended Multiword DMA transfer cycle time Words 82-84 Features/command sets supported Words 85-87 Features/command sets enabledWord 68 Minimum PIO transfer cycle time with Iordy Word 91 Advanced power management level value Word 89 Time required for Security erase unit completionWord 128 Security Status Bit 8 Security Level Word 160 Power Requirement Description Value Maximum PIO mode timing selectedAdditional Requirements for CF Advanced Timing Modes Value Maximum Multiword DMA timing mode supported Value Current PIO timing mode selectedValue Current Multiword DMA timing mode selected Value Maximum Pcmcia IO timing mode Supported Drive Cyl High Cyl Low Sec Num Sec Cnt Feature Idle 97h or E3hIdle Immediate 95h or E1h Initialize Drive Parameters 91h Read Buffer E4h Read DMA C8h Read Multiple C4h Read Sectors 20h or 21h Read Verify Sectors 40h or 41h Recalibrate 1Xh Request Sense 03h Table Extended Error Codes Seek 7Xh Set Features EFh Table Feature Supported Set Multiple Mode C6h Set Sleep Mode- 99h or E6h Standby 96h or E2h Standby Immediate 94h or E0h Translate Sector 87hTableTranslate Sector Information Wear Level F5h Write Buffer E8hWrite DMA CAh Write Multiple Command C5h Write Multiple without Erase CDh Write Sectors 30h or 31h Write Sectors without Erase 38h Write Verify 3Ch 80X CompactFlash Card Error Posting BBK UNC Idnf Abrt Amnf Drdy DWF DSC Corr ERR Address Data Description of Contents CIS function CIS Description Address Data 5 4 Description of Contents CIS function Cistplconfig V1.1 MS IR IO RO a Address Data 5 4 3 2 1 Description of Contents CIS function Irqn LS AS NR RO a T