Contents
EM78P259N/260N
Elan Microelectronics Corporation
Contents
Analog-To-Digital Converter ADC
Reset and Wake-up
TCC/WDT and Prescaler
6.1
11.3
11.1
11.2
11.4
Doc. Version Revision Description
Date
General Description
Features
Bit Microprocessor with OTP ROM
Pin DIP/SOP
Block Diagram
Pin Assignment
Pin DIP/SOP/SSOP
Pin Description
Symbol Pin No Type Function
EM78P259NP/M
EM78P260NP/M/KM
1 R0 Indirect Address Register
Function Description
Operational Registers
2 R1 Time Clock /Counter
EM78P259N/260N
Bit Microprocessor with OTP ROM Data Memory Configuration
Cont
Bit
5 R4 RAM Select Register
Bit 4 T
Bits 5~0
7 R7 Port
Bit 7 ~ Bit 4 C3 ~ C0 Calibrator of internal RC mode
6 R5 ~ R6 Port 5 ~ Port
Bit 7 ~ Bit
8 R8 Aisr ADC Input Select Register
9 R9 Adcon ADC Control Register
Bit 3 Adpd
Bit 5 ~ Bit 3 VOF2 ~ VOF0 Offset voltage bits
RA Adoc ADC Offset Calibration Register
RB Addata Converted Value of ADC
Bit 2 ~ Bit 0 Unimplemented, read as ‘0’
RD ADDATA1L Converted Value of ADC
RC ADDATA1H Converted Value of ADC
RE Interrupt Status 2 & Wake-up Control Register
16 R10 ~ R3F
RF Interrupt Status 2 Register
All of these are 8-bit general-purpose registers
Accumulator
Special Purpose Registers
Control Register
Bit 7 & Bit 6 Not used
3 IOC50 ~ IOC70 I/O Port Control Register
4 IOC80 Comparator and Tcca Control Register
Bit 4 & Bit 3 COS1 & COS0 Comparator/OP Select bits
Tccc signal source
Bit 6 Tccben Tccb enable bit 0 = disable Tccb
Bit 4 Tccbte Tccb signal edge
Bit 0 Tcccte Tccc signal edge
IOCA0 IR and Tccc Scale Control Register
Bit 1 LGP
Bit 3 IRE
Bit 2 HF
Bit 0 Iroute
Bit PD57 PD56 PD55 PD54 PD53 PD52 PD51 PD50
IOCB0 Pull-down Control Register
IOCC0 Open-Drain Control Register
Bit OD67 OD66 OD65 OD64 OD63 OD62 OD61 OD60
IOCE0 WDT Control & Interrupt Mask Registers
IOCD0 Pull-high Control Register
Bit PH57 PH56 PH55 PH54 PH53 PH52 PH51 PH50
= Enable Lpwtif interrupt
Lpwtif interrupt enable bit
= Disable Lpwtif interrupt
IOCF0 Interrupt Mask Register
12 IOC51 Tcca Counter
13 IOC61 Tccb Counter
14 IOC71 TCCBH/MSB Counter
15 IOC81 Tccc Counter
IOCA1 High Time Register
16 IOC91 Low Time Register
IOCB1 High/Low Time Scale Control Register
Bit 2 ~ Bit 0 LTS2 ~ LTS0 Low time scale bits
IOCC1 TCC Prescaler Counter
TCC prescaler counter can be read and written to
TCC/WDT and Prescaler
I/O Ports
MUX
I/O Port and I/O Control Register Circuit for P60 /INT
I/O Port and I/O Control Register Circuit for Port 50 ~ P57
Usage of Port 5 Input Change Wake-up/Interrupt Function
Reset and Wake-up
Reset and Wake-up Operation
Wake-up Wake-up and Interrupt
EM78P259N/260N
Select Segment
Signal Sleep Mode Normal Mode
Comparator
Address Name Reset Type Bit
Following summarizes the initialized values for registers
Name Reset Type Bit
HTR7 HTR6 HTR5 HTR4 HTR3 HTR2 HTR1 HTR0
Aisr
Controller Reset Block Diagram
Tcif
T and P Status under Status R3 Register
Interrupt
Event
EM78P259N/260N
Reti
Interrupt Vector Interrupt Status Priority
1.1 R8 Aisr ADC Input Select Register
Analog-to-Digital Converter ADC
ADC Control Register AISR/R8, ADCON/R9, ADOC/RA
Bit 7 ~ Bit 3 ADE3 Bit 2 ADE2
P54/TCC/VREF Pin Priority High Medium Low
1.2 R9 Adcon AD Control Register
P54
= ADC is operating
While the CPU is operating
RA Adoc AD Offset Calibration Register
ADC Sampling Time
ADC Operation during Sleep Mode
ADC Data Register ADDATA/RB, ADDATA1H/RC, ADDATA1L/RD
AD Conversion Time
Programming Process
Programming Process/Considerations
Follow these steps to obtain data from the ADC
ADC Control Register
Sample Demo Programs Define a General Register
Define a Control Register
Define Bits in Adcon
AD power on
Infrared Remote Control Application/PWM Waveform Generation
Overview
Function Description
Fcarrier
IRE Irout
IR/PWM Related Status/Data Registers
Programming the Related Registers
Address Name Bit
EM78P259N/260N
Under Tcca Counter IOC51
Timer/Counter
Under Tccb Counter IOC61
Under Tccc Counter IOC81
Comparator
Related Tccx Status/Data Registers
External Reference Signal
Comparator Output
Wake-up from Sleep Mode
Using a Comparator as an Operation Amplifier
Comparator Interrupt
Oscillator Modes
Oscillator
Oscillator Modes
Conditions
Oscillator Type
Crystal Oscillator/Ceramic Resonators Crystal
Frequency C1pF C2pF
External RC Oscillator Mode
18 Serial Mode Crystal/Resonator Circuit Diagram
Cext Rext Average Fosc 5V, 25C Average Fosc 3V, 25C
Internal RC Oscillator Mode
Internal Drift Rate RC Frequency Temperature
40C ~ +85C 3V~5.5V Total
External Power-on Reset Circuit
Power-on Considerations
Programmable WDT Time-out Period
EM78P259N
Residual Voltage Protection
Vdd
EM78P260N
Word Word1 Bit12 ~ Bit0
Code Option
Code Option Register Word
Word Bit Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit
Bit Microprocessor with OTP ROM Bit 3 HLP
= Pulses equal to 8/fc s is regarded as signal
= Pulses equal to 32/fc s is regarded as signal default
Bit 2 ~ 0 PR2 ~ PR0 Protect Bits
Instruction Set
Bit 1 & Bit 0 RCM1, RCM0 RC mode selection bits
Customer ID Register Word
Instruction Binary
Following are the EM78P259N/260N instruction set
Mnemonic Operation Status Affected
Absolute Maximum Ratings
Items Rating
Symbol Parameter Condition Min Typ Max Unit
DC Electrical Characteristics
Ta=25 C, VDD=5.0V±5%, VSS=0V
Internal RC Drift Rate
Voltage Min Typ Max
AD Converter Characteristics
Vdd=2.5V to 5.5V, Vss=0V, Ta=25C
Device Characteristics
Comparator OP Characteristics
Vdd = 5.0V, Vss=0V, Ta=25C
Symbol Parameter Conditions Min Typ Max Unit
AC Electrical Characteristic
Ta=25C, VDD=5V±5%, VSS=0V
AC Test Input/Output Waveform
Timing Diagrams
Reset Timing CLK=0
TCC Input Timing CLKS=0
18-Lead Plastic Dual in line Pdip 300 mil
Package Type
Package Information
Package Type Pin Count Package Size
18-Lead Plastic Small Outline SOP 300 mil
838
Lead Plastic Shrink Small Outline Ssop 209 mil
650
Lead Plastic Dual-in-line Pdip 300 mil
Lead Plastic Small Outline SOP 300 mil
Address Trap Detect
Quality Assurance and Reliability
Test Category Test Conditions Remarks