IBM EM78P259N/260N Package Type, Package Information, Lead Plastic Dual in line Pdip 300 mil

Page 84

EM78P259N/260N

8-Bit Microprocessor with OTP ROM

APPENDIX

A

Package Type

 

 

 

 

 

 

 

 

 

 

 

 

 

OTP MCU

Package Type

Pin Count

Package Size

 

 

 

EM78P259NPS/NPJ

DIP

18

300mil

 

 

 

 

 

 

 

 

 

 

EM78P259NMS/NMJ

SOP

18

300mil

 

 

 

 

 

 

 

 

 

 

EM78P260NPS/NPJ

DIP

20

300mil

 

 

 

 

 

 

 

 

 

 

EM78P260NMS/NMJ

SOP

20

300mil

 

 

 

 

 

 

 

 

 

 

EM78P260NKMS/NKMJ

SSOP

20

209mil

 

 

 

 

 

 

 

 

 

 

 

 

 

B

Package Information

 

 

 

B.1 18-Lead Plastic Dual in line (PDIP) 300 mil

 

Symbal

Min

Normal

Max

 

A

 

 

4.450

 

A1

0.381

 

 

 

A2

3.175

3.302

3.429

 

c

0.203

0.254

0.356

 

D

22.610

22.860

23.110

 

E1

6.220

6.438

6.655

 

E

7.370

7.620

7.870

 

eB

8.510

9.020

9.530

 

B

0.356

0.457

0.559

eB

B1

1.143

1.524

1.778

 

L

3.048

3.302

3.556

 

e

 

2.540(TYP)

θ

θ

0

 

15

 

TITLE:

 

 

 

PDIP-18L 300MIL PACKAGE

 

OUTLINE DIMENSION

 

 

File :

D18

Edtion: A

 

 

 

 

Unit : mm

 

 

 

 

 

 

Scale: Free

 

 

 

Material:

 

 

 

Sheet:1 of 1

78 •

Product Specification (V1.2) 05.18.2007

(This specification is subject to change without further notice)

Image 84
Contents EM78P259N/260N Elan Microelectronics Corporation Contents Reset and Wake-up TCC/WDT and PrescalerAnalog-To-Digital Converter ADC 6.111.1 11.211.3 11.4Doc. Version Revision Description DateFeatures General DescriptionBit Microprocessor with OTP ROM Block Diagram Pin AssignmentPin DIP/SOP Pin DIP/SOP/SSOPSymbol Pin No Type Function Pin DescriptionEM78P259NP/M EM78P260NP/M/KM Function Description Operational Registers1 R0 Indirect Address Register 2 R1 Time Clock /CounterEM78P259N/260N Bit Microprocessor with OTP ROM Data Memory Configuration Cont5 R4 RAM Select Register Bit 4 TBit Bits 5~0Bit 7 ~ Bit 4 C3 ~ C0 Calibrator of internal RC mode 6 R5 ~ R6 Port 5 ~ Port7 R7 Port Bit 7 ~ Bit8 R8 Aisr ADC Input Select Register 9 R9 Adcon ADC Control Register Bit 3 AdpdRA Adoc ADC Offset Calibration Register RB Addata Converted Value of ADCBit 5 ~ Bit 3 VOF2 ~ VOF0 Offset voltage bits Bit 2 ~ Bit 0 Unimplemented, read as ‘0’RC ADDATA1H Converted Value of ADC RD ADDATA1L Converted Value of ADCRE Interrupt Status 2 & Wake-up Control Register RF Interrupt Status 2 Register 16 R10 ~ R3FAll of these are 8-bit general-purpose registers Special Purpose Registers AccumulatorControl Register 3 IOC50 ~ IOC70 I/O Port Control Register 4 IOC80 Comparator and Tcca Control RegisterBit 7 & Bit 6 Not used Bit 4 & Bit 3 COS1 & COS0 Comparator/OP Select bitsBit 6 Tccben Tccb enable bit 0 = disable Tccb Bit 4 Tccbte Tccb signal edgeTccc signal source Bit 0 Tcccte Tccc signal edgeIOCA0 IR and Tccc Scale Control Register Bit 3 IRE Bit 2 HFBit 1 LGP Bit 0 IrouteIOCB0 Pull-down Control Register IOCC0 Open-Drain Control RegisterBit PD57 PD56 PD55 PD54 PD53 PD52 PD51 PD50 Bit OD67 OD66 OD65 OD64 OD63 OD62 OD61 OD60IOCD0 Pull-high Control Register IOCE0 WDT Control & Interrupt Mask RegistersBit PH57 PH56 PH55 PH54 PH53 PH52 PH51 PH50 Lpwtif interrupt enable bit = Disable Lpwtif interrupt= Enable Lpwtif interrupt IOCF0 Interrupt Mask Register12 IOC51 Tcca Counter 13 IOC61 Tccb Counter14 IOC71 TCCBH/MSB Counter 15 IOC81 Tccc Counter16 IOC91 Low Time Register IOCA1 High Time RegisterIOCB1 High/Low Time Scale Control Register IOCC1 TCC Prescaler Counter Bit 2 ~ Bit 0 LTS2 ~ LTS0 Low time scale bitsTCC prescaler counter can be read and written to TCC/WDT and Prescaler I/O Ports MUXI/O Port and I/O Control Register Circuit for P60 /INT I/O Port and I/O Control Register Circuit for Port 50 ~ P57 Reset and Wake-up Reset and Wake-up OperationUsage of Port 5 Input Change Wake-up/Interrupt Function Wake-up Wake-up and InterruptEM78P259N/260N Select Segment Signal Sleep Mode Normal Mode Comparator Address Name Reset Type Bit Following summarizes the initialized values for registersName Reset Type Bit HTR7 HTR6 HTR5 HTR4 HTR3 HTR2 HTR1 HTR0 Aisr Controller Reset Block Diagram TcifInterrupt T and P Status under Status R3 RegisterEvent EM78P259N/260N Reti Interrupt Vector Interrupt Status PriorityAnalog-to-Digital Converter ADC ADC Control Register AISR/R8, ADCON/R9, ADOC/RA1.1 R8 Aisr ADC Input Select Register Bit 7 ~ Bit 3 ADE3 Bit 2 ADE21.2 R9 Adcon AD Control Register P54/TCC/VREF Pin Priority High Medium LowP54 While the CPU is operating = ADC is operatingRA Adoc AD Offset Calibration Register ADC Operation during Sleep Mode ADC Data Register ADDATA/RB, ADDATA1H/RC, ADDATA1L/RDADC Sampling Time AD Conversion TimeProgramming Process/Considerations Programming ProcessFollow these steps to obtain data from the ADC Sample Demo Programs Define a General Register Define a Control RegisterADC Control Register Define Bits in AdconAD power on Infrared Remote Control Application/PWM Waveform Generation OverviewFunction Description FcarrierIRE Irout Programming the Related Registers IR/PWM Related Status/Data RegistersAddress Name Bit EM78P259N/260N Timer/Counter Under Tcca Counter IOC51Under Tccb Counter IOC61 Under Tccc Counter IOC81 Comparator Related Tccx Status/Data RegistersExternal Reference Signal Comparator OutputUsing a Comparator as an Operation Amplifier Wake-up from Sleep ModeComparator Interrupt Oscillator Oscillator ModesOscillator Modes ConditionsCrystal Oscillator/Ceramic Resonators Crystal Oscillator TypeFrequency C1pF C2pF External RC Oscillator Mode 18 Serial Mode Crystal/Resonator Circuit DiagramInternal RC Oscillator Mode Internal Drift Rate RC Frequency TemperatureCext Rext Average Fosc 5V, 25C Average Fosc 3V, 25C 40C ~ +85C 3V~5.5V TotalPower-on Considerations External Power-on Reset CircuitProgrammable WDT Time-out Period Residual Voltage Protection VddEM78P259N EM78P260NCode Option Code Option Register WordWord Word1 Bit12 ~ Bit0 Word Bit Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit= Pulses equal to 8/fc s is regarded as signal = Pulses equal to 32/fc s is regarded as signal defaultBit Microprocessor with OTP ROM Bit 3 HLP Bit 2 ~ 0 PR2 ~ PR0 Protect BitsBit 1 & Bit 0 RCM1, RCM0 RC mode selection bits Instruction SetCustomer ID Register Word Following are the EM78P259N/260N instruction set Instruction BinaryMnemonic Operation Status Affected Absolute Maximum Ratings Items RatingDC Electrical Characteristics Symbol Parameter Condition Min Typ Max UnitTa=25 C, VDD=5.0V±5%, VSS=0V Internal RC Drift Rate Voltage Min Typ MaxAD Converter Characteristics Vdd=2.5V to 5.5V, Vss=0V, Ta=25CComparator OP Characteristics Device CharacteristicsVdd = 5.0V, Vss=0V, Ta=25C AC Electrical Characteristic Symbol Parameter Conditions Min Typ Max UnitTa=25C, VDD=5V±5%, VSS=0V Timing Diagrams Reset Timing CLK=0AC Test Input/Output Waveform TCC Input Timing CLKS=0Package Type Package Information18-Lead Plastic Dual in line Pdip 300 mil Package Type Pin Count Package Size18-Lead Plastic Small Outline SOP 300 mil 838Lead Plastic Shrink Small Outline Ssop 209 mil 650Lead Plastic Dual-in-line Pdip 300 mil Lead Plastic Small Outline SOP 300 mil Quality Assurance and Reliability Address Trap DetectTest Category Test Conditions Remarks