IBM EM78P259N/260N manual Pin Description, EM78P259NP/M, Symbol Pin No Type Function

Page 9

EM78P259N/260N

8-Bit Microprocessor with OTP ROM

5Pin Description

5.1EM78P259NP/M

Symbol

Pin No.

Type

Function

 

 

 

 

 

 

 

 

P70

15

I/O

General purpose input/output pin

Default value after a power-on reset

 

 

 

 

 

 

 

P60~P67

6~13

I/O

General purpose input/output pin

Open-drain

 

 

 

Default value after a power-on reset

 

 

 

General purpose input/output pin

P50~P55

1~3

I/O

Pull-high/pull-down

16~18

Default value after a power-on reset

 

 

 

 

 

Wake up from sleep mode when the status of the pin changes

 

 

 

“-“ : the input pin of Vin- of the comparator

CIN-, CIN+

12, 11

I

“+” : the input pin of Vin+ of the comparator

CO

10

O

Pin CO is the comparator output

 

 

 

Defined by IOC80 <4:3>

 

 

 

 

OSCI

16

I

Crystal type: Crystal input terminal or external clock input pin

RC type: RC oscillator input pin

 

 

 

OSCO

15

I/O

Crystal type: Crystal input terminal or external clock input pin.

RC type: clock output with a duration of one instruction cycle

 

 

 

External clock signal input

 

 

 

If set as /RESET and remains at logic low, the device will be

/RESET

4

I

reset

Voltage on /RESET/Vpp must not exceed Vdd during normal

 

 

 

 

 

 

mode

 

 

 

 

 

 

 

External Counter input

TCC, TCCA,

3, 7,

I

TCC is defined by CONT <5>

TCCA is defined by IOC80 <1>

TCCB, TCCC

8, 9

 

TCCB is defined by IOC90 <5>

 

 

 

 

 

 

TCCC is defined by IOC90 <1>

ADC0~ADC3

1, 2,

I

Analog to Digital Converter

17, 18

Defined by ADCON (R9) <1:0>

 

 

IR OUT

13

O

IR mode output pin, capable of driving and sinking

current=20mA when the output voltage drops to 0.7Vdd and

 

 

 

rise to0.3Vdd at Vdd=5V.

VREF

3

I

External reference voltage for ADC

Defined by ADCON (R9) <7>

 

 

 

/INT

6

I

External interrupt pin triggered by a falling or rising edge

Defined by CONT <7>

 

 

 

VDD

14

–

Power supply

VSS

5

–

Ground

Product Specification (V1.2) 05.18.2007

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(This specification is subject to change without further notice)

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Contents EM78P259N/260N Elan Microelectronics Corporation Contents TCC/WDT and Prescaler Reset and Wake-upAnalog-To-Digital Converter ADC 6.111.2 11.111.3 11.4Date Doc. Version Revision DescriptionFeatures General DescriptionBit Microprocessor with OTP ROM Pin Assignment Block DiagramPin DIP/SOP Pin DIP/SOP/SSOPSymbol Pin No Type Function Pin DescriptionEM78P259NP/M EM78P260NP/M/KM Operational Registers Function Description1 R0 Indirect Address Register 2 R1 Time Clock /CounterEM78P259N/260N Cont Bit Microprocessor with OTP ROM Data Memory ConfigurationBit 4 T 5 R4 RAM Select RegisterBit Bits 5~06 R5 ~ R6 Port 5 ~ Port Bit 7 ~ Bit 4 C3 ~ C0 Calibrator of internal RC mode7 R7 Port Bit 7 ~ Bit8 R8 Aisr ADC Input Select Register Bit 3 Adpd 9 R9 Adcon ADC Control RegisterRB Addata Converted Value of ADC RA Adoc ADC Offset Calibration RegisterBit 5 ~ Bit 3 VOF2 ~ VOF0 Offset voltage bits Bit 2 ~ Bit 0 Unimplemented, read as ‘0’RC ADDATA1H Converted Value of ADC RD ADDATA1L Converted Value of ADCRE Interrupt Status 2 & Wake-up Control Register RF Interrupt Status 2 Register 16 R10 ~ R3FAll of these are 8-bit general-purpose registers Special Purpose Registers AccumulatorControl Register 4 IOC80 Comparator and Tcca Control Register 3 IOC50 ~ IOC70 I/O Port Control RegisterBit 7 & Bit 6 Not used Bit 4 & Bit 3 COS1 & COS0 Comparator/OP Select bitsBit 4 Tccbte Tccb signal edge Bit 6 Tccben Tccb enable bit 0 = disable TccbTccc signal source Bit 0 Tcccte Tccc signal edgeIOCA0 IR and Tccc Scale Control Register Bit 2 HF Bit 3 IREBit 1 LGP Bit 0 IrouteIOCC0 Open-Drain Control Register IOCB0 Pull-down Control RegisterBit PD57 PD56 PD55 PD54 PD53 PD52 PD51 PD50 Bit OD67 OD66 OD65 OD64 OD63 OD62 OD61 OD60IOCD0 Pull-high Control Register IOCE0 WDT Control & Interrupt Mask RegistersBit PH57 PH56 PH55 PH54 PH53 PH52 PH51 PH50 = Disable Lpwtif interrupt Lpwtif interrupt enable bit= Enable Lpwtif interrupt IOCF0 Interrupt Mask Register13 IOC61 Tccb Counter 12 IOC51 Tcca Counter15 IOC81 Tccc Counter 14 IOC71 TCCBH/MSB Counter16 IOC91 Low Time Register IOCA1 High Time RegisterIOCB1 High/Low Time Scale Control Register IOCC1 TCC Prescaler Counter Bit 2 ~ Bit 0 LTS2 ~ LTS0 Low time scale bitsTCC prescaler counter can be read and written to TCC/WDT and Prescaler MUX I/O PortsI/O Port and I/O Control Register Circuit for P60 /INT I/O Port and I/O Control Register Circuit for Port 50 ~ P57 Reset and Wake-up Operation Reset and Wake-upUsage of Port 5 Input Change Wake-up/Interrupt Function Wake-up Wake-up and InterruptEM78P259N/260N Select Segment Signal Sleep Mode Normal Mode Comparator Following summarizes the initialized values for registers Address Name Reset Type BitName Reset Type Bit HTR7 HTR6 HTR5 HTR4 HTR3 HTR2 HTR1 HTR0 Aisr Tcif Controller Reset Block DiagramInterrupt T and P Status under Status R3 RegisterEvent EM78P259N/260N Interrupt Vector Interrupt Status Priority RetiADC Control Register AISR/R8, ADCON/R9, ADOC/RA Analog-to-Digital Converter ADC1.1 R8 Aisr ADC Input Select Register Bit 7 ~ Bit 3 ADE3 Bit 2 ADE21.2 R9 Adcon AD Control Register P54/TCC/VREF Pin Priority High Medium LowP54 While the CPU is operating = ADC is operatingRA Adoc AD Offset Calibration Register ADC Data Register ADDATA/RB, ADDATA1H/RC, ADDATA1L/RD ADC Operation during Sleep ModeADC Sampling Time AD Conversion TimeProgramming Process/Considerations Programming ProcessFollow these steps to obtain data from the ADC Define a Control Register Sample Demo Programs Define a General RegisterADC Control Register Define Bits in AdconAD power on Overview Infrared Remote Control Application/PWM Waveform GenerationFcarrier Function DescriptionIRE Irout Programming the Related Registers IR/PWM Related Status/Data RegistersAddress Name Bit EM78P259N/260N Timer/Counter Under Tcca Counter IOC51Under Tccb Counter IOC61 Under Tccc Counter IOC81 Related Tccx Status/Data Registers ComparatorComparator Output External Reference SignalUsing a Comparator as an Operation Amplifier Wake-up from Sleep ModeComparator Interrupt Oscillator Modes OscillatorOscillator Modes ConditionsCrystal Oscillator/Ceramic Resonators Crystal Oscillator TypeFrequency C1pF C2pF 18 Serial Mode Crystal/Resonator Circuit Diagram External RC Oscillator ModeInternal Drift Rate RC Frequency Temperature Internal RC Oscillator ModeCext Rext Average Fosc 5V, 25C Average Fosc 3V, 25C 40C ~ +85C 3V~5.5V TotalPower-on Considerations External Power-on Reset CircuitProgrammable WDT Time-out Period Vdd Residual Voltage ProtectionEM78P259N EM78P260NCode Option Register Word Code OptionWord Word1 Bit12 ~ Bit0 Word Bit Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit= Pulses equal to 32/fc s is regarded as signal default = Pulses equal to 8/fc s is regarded as signalBit Microprocessor with OTP ROM Bit 3 HLP Bit 2 ~ 0 PR2 ~ PR0 Protect BitsBit 1 & Bit 0 RCM1, RCM0 RC mode selection bits Instruction SetCustomer ID Register Word Following are the EM78P259N/260N instruction set Instruction BinaryMnemonic Operation Status Affected Items Rating Absolute Maximum RatingsDC Electrical Characteristics Symbol Parameter Condition Min Typ Max UnitTa=25 C, VDD=5.0V±5%, VSS=0V Voltage Min Typ Max Internal RC Drift RateVdd=2.5V to 5.5V, Vss=0V, Ta=25C AD Converter CharacteristicsComparator OP Characteristics Device CharacteristicsVdd = 5.0V, Vss=0V, Ta=25C AC Electrical Characteristic Symbol Parameter Conditions Min Typ Max UnitTa=25C, VDD=5V±5%, VSS=0V Reset Timing CLK=0 Timing DiagramsAC Test Input/Output Waveform TCC Input Timing CLKS=0Package Information Package Type18-Lead Plastic Dual in line Pdip 300 mil Package Type Pin Count Package Size838 18-Lead Plastic Small Outline SOP 300 mil650 Lead Plastic Shrink Small Outline Ssop 209 milLead Plastic Dual-in-line Pdip 300 mil Lead Plastic Small Outline SOP 300 mil Quality Assurance and Reliability Address Trap DetectTest Category Test Conditions Remarks
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