Inova ICP-PII user manual Vga

Page 17

ICP-PIII

Product Overview

 

 

®CompactPCI

Figure 1.20 ICP-PIII Overview

 

100/10Mbit

 

 

Ethernet

 

VGA,

FireWire

 

GigaST)R

USB

FLASH Extension:

PanelLink

 

Up to 512MByte

LVDS,

 

 

 

 

Socket 370 or

 

 

BGA2 based

 

 

Intel Pentium III

 

 

or Celeron

TFT,

GigaST)R,

PanelLink or LVDS

Optional Lynx3DM or Radeon VE Graphic Controller (Under-

side)

North-Bridge

PCI Interface for

Piggyback Extensions

128MB or 384MB

Optional

SDRAM Extension

Multiprocessing

512MByte in Development

 

1

Inova’s CPUs have been prepared for rear I/O operation. Currently (RIO-C), EIDE, FireWire2, USB2, LPT1 and the loudspeaker signals are present on the backplane (if requested at time of order.) Other options may also be available (including customer specific) but are not referred to in this user’s handbook. In order to take full advantage of the rear I/O features, the CompactPCI back- plane needs to support them. Inova provides two standard versions; one has the J2 connector at the CPU location extended to the rear of the backplane while the other version has all slots fitted with the J2 connector on both the front and rear.

Doc. PD00581013.004

©2002 Inova Computers GmbH

Page1-7

Image 17
Contents ICP-PIII USA Contents PrefaceICP-PIII CompactPCI Backplane A1 IPB-FPE8 CPU Extension B1 IPM-ATA CPU Extension Unpacking and Special Handling Instructions Revision History ICP-PIIIPreface Revision HistoryThree Year Limited Warranty Overview Contents ICP-PIII Peripherals InterfacingSoftware GraphicsMobile Piii SpecificationsCompactPCI CPU Family Processor CPU Speeds Multi-Processing Package ConfigurationVGA Linux SoftwareVentureCom WindowsVxWorks Windows CE36 OS-9 37 QNXHardware Block DiagramDescription Connector LocationConnector Description Interface Description & Location Front-Panel Features44 Front-Panel Options 45 Interfaces Interface PositionsConfiguration Con Tents Memory Map ConfigurationICP-PIIIPort Addressing UMB Reservations for ISA Start Address Finish AddressAddress Description I/O Mapped PeripheralsInterrupt Routing Memory Mapped PeripheralsInterrupt Request Interrupt Vector Function/Assignment Device Description PCI Interrupt Number Routing Inova Piii Device ListCompactPCI Interrupt ConfigurationWatchdog Timer / CounterTimer Function/Assignment This page has been left blank intentionally Page2-10 Interfaces Contents InterfacesICP-PIII ICP-PIII Connector J1 and J2 CompactPCI J1/J2 ConnectorCompactPCI Connector Pin Nr Row a Row B Row C Row D Row E CompactPCI CLK6 GND CompactPCI CLK6 GND FWTPA+ Fwtpa HCS0# Option Rear I/OCompactPCI Backplane 10 Inova’s 32-Bit CompactPCI 8-Slot Backplane RH System Slot 21 J7 & J12 Fast Ethernet Pin No SignalInterfaces 22 J17 VGA Interface Resolution 256 16.7M 23 J16 PanelLink Interface Pin No Signal24 GigaSTAR D-Sub Interface Pinout 11 GigaSTAR Interface 24 J16 GigaSTAR Interface25 J19 USB Interface 25 USB Interface Pinout 25 USB Connector Signals26 FireWire Interface Pinout 26 FireWire Connector Signals 26 J15 FireWire Interface27 J20 Infrared iRdA Interface 28 J20 Reset Button29 J14 Flash Interface 30 J18 Floppy Disk Interface31 CPU to IPB-FPE8 Connection Connecting the Piii to the Inova IPB-FPE8CompactPCI Connecting the Piii to the Inova ICP-HD-133 CPU to IPB-FPE12 Connection Connecting the Piii to the Inova IPB-FPE1234 CPU to IPB-FPE12 Connection 35 CPU to Slim-Line Floppy Disk Connection Connecting the Piii to the ICP-FD-1IPB-FPE8 A1.2 IPB-FPE8 & Front-panel 4HP or 8HP A1 IPB-FPE8 CPU ExtensionA1.1 J11 Interface for COM1, Mouse & Keyboard Pin J11 A1.3 Stand-Alone IPB-FPE8Description A1.4 IPB-FPE8MS Theme VariationA1.5 IPB-FPE8MS Description CompactPCIA1.7 Mouse Interface A1.6 Keyboard InterfaceA1.8 COM1 Interface CompactPCIThis page has been left blank intentionally PageA-8 ICP-HD B1.2 ICP-HD-1 & Front-panel 4HP or 8HP B1 ICP-HD CPU ExtensionB1.1 J11, J13 Interfaces Figure B1.3 IDE Carrier Board ICP-HD1 B1.3 IDE Carrier Board ICP-HD-1Figure B1.4 IDE Carrier ICP-HDE8MS B1.4 ICP-HDE8MS Theme VariationThen the COM2 on the IDE carriers Figure B1.5 Top & Bottom Views of the ICP-HDE8MS B1.5 ICP-HDE8MS DescriptionB1.7 Mouse Interface B1.6 Keyboard InterfaceB1.8 COM1 & COM 2 Interfaces Pin No Signal RS232IPM-ATA B1.1 J1 Interfaces B1 IPM-ATA CPU ExtensionKEY B1.1 J1 Interfaces ContdMaster Slave Compact FlashJumper J6 Jumper J7 MasterPcmcia Device in J5 Jumper J8 Master B1.4 IPM-ATA-PCMCIATest Position Compact Flash Card Jumper Result B1.5 Device CompatibilityThis page has been left blank intentionally PageB-8 IPB-FPE12 C1.2 IPB-FPE12 & Front-panel 4HP or 12HP C1 IPB-FPE12 CPU ExtensionC1.1 J13 Interface for LPT1 & COM2 J13 C1.3 LPT1 & COM2 PiggybackTable C1.3 IPB-FPE12 Connector Description Figure C1.6 LPT1 Interface Pinout C1.4 LPT1 InterfaceC1.5 COM2 Interface IPB-RIO D1 IPB-RIO CPU Extension Appendix DHard Disk J10 Hard Disk J9 Rear I/O C D1.3 IPB-RIO-C-SHORTD1.4 IPB-RIO-C-80MM This page has been left blank intentionally PageD-6