Inova ICP-PII user manual Hardware, Block Diagram

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Product Overview

ICP-PIII

 

 

1.4Hardware

1.41Block Diagram

Figure 1.41 Block Diagram

 

 

 

x86 Ôprocessor

 

 

 

 

 

 

Pentium III,

 

 

 

VGA

 

Silicon Motion

 

Celeron

 

 

 

 

 

 

 

 

 

 

Lynx3DM

 

 

 

 

 

GigaST)R

 

 

Socket

 

 

 

 

or

 

 

 

 

PanelLink

 

AGP

FC-PGA 370

 

 

 

 

ATI Radeon VE

 

 

 

TFT

 

 

or

 

 

 

 

Graphics

 

 

 

SDRAM (ECC)

 

 

 

BGA2 (Mobile)

 

 

 

 

 

 

 

 

 

 

8/16 MByte

 

 

 

 

128 MByte

 

 

SGRAM

 

 

 

 

 

 

 

 

 

 

On-Board

 

 

 

 

 

 

 

10/100 Mbit/s

Intel 82559 Ethernet

North Bridge

 

128/384 MByte

Ethernet

 

 

 

 

 

 

 

Intel 82443BX

PC100

Piggyback

 

 

 

Extension

10/100 Mbit/s

Intel 82559 Ethernet

 

 

 

 

 

Ethernet

 

 

 

 

 

 

 

 

 

 

 

PCI/PCI Bridge

 

 

 

 

 

 

 

400 Mbit/s

PL

TSB 12LV23

 

PCI Bus

 

 

System Slot

FireWire

 

 

 

 

or

 

 

 

 

 

 

 

 

 

 

 

 

 

Peripheral Device

2x USB

 

 

USB

South

IRQ

 

 

Mouse/Key.

 

 

PS/2

Bridge

FDC

 

Floppy

COM1/2

 

 

COM 1/2

ALi 1543C

EIDE

 

Hard-Disk

LPT1

 

 

LPT 1

PCI2ISA

Power

 

(2 Channels. 4 Devices)

 

 

 

 

 

 

 

 

 

 

 

Piggyback

 

 

RTC

 

ISA Bus

 

 

Up to 512 MByte

 

 

 

 

 

 

M-Systems

 

 

 

 

 

 

 

 

 

 

 

FLASH (BIOS)

 

 

Disk-On-Chipª

This block diagram is applicable to all Inova’s PIII-based CPUs. Components and/or functionality may change without notice. An extra PCI load can be attached to the on-board 80-pin header. An open specification is available allowing developers to manufacture their own PCI device.

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©2002 Inova Computers GmbH

Doc. PD00581013.004

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Contents ICP-PIII USA Contents PrefaceICP-PIII CompactPCI Backplane A1 IPB-FPE8 CPU Extension B1 IPM-ATA CPU Extension Unpacking and Special Handling Instructions ICP-PIIIPreface Revision History Revision HistoryThree Year Limited Warranty Overview Contents ICP-PIII Interfacing PeripheralsSoftware GraphicsSpecifications Mobile PiiiCompactPCI Configuration CPU Family Processor CPU Speeds Multi-Processing PackageVGA Software LinuxVentureCom WindowsWindows CE VxWorks36 OS-9 37 QNXBlock Diagram HardwareDescription Connector LocationConnector Description Front-Panel Features Interface Description & Location44 Front-Panel Options Interface Positions 45 InterfacesConfiguration Con Tents ConfigurationICP-PIII Memory MapUMB Reservations for ISA Start Address Finish Address Port AddressingI/O Mapped Peripherals Address DescriptionMemory Mapped Peripherals Interrupt RoutingInterrupt Request Interrupt Vector Function/Assignment Inova Piii Device List Device Description PCI Interrupt Number RoutingInterrupt Configuration CompactPCIWatchdog Timer / CounterTimer Function/Assignment This page has been left blank intentionally Page2-10 Interfaces Contents InterfacesICP-PIII ICP-PIII Connector J1 and J2 CompactPCI J1/J2 ConnectorCompactPCI Connector Pin Nr Row a Row B Row C Row D Row E CompactPCI CLK6 GND CompactPCI CLK6 GND FWTPA+ Fwtpa HCS0# Rear I/O OptionCompactPCI Backplane 10 Inova’s 32-Bit CompactPCI 8-Slot Backplane RH System Slot 21 J7 & J12 Fast Ethernet Pin No SignalInterfaces 22 J17 VGA Interface Resolution 256 16.7M Pin No Signal 23 J16 PanelLink Interface24 J16 GigaSTAR Interface 24 GigaSTAR D-Sub Interface Pinout 11 GigaSTAR Interface25 USB Interface Pinout 25 USB Connector Signals 25 J19 USB Interface26 J15 FireWire Interface 26 FireWire Interface Pinout 26 FireWire Connector Signals28 J20 Reset Button 27 J20 Infrared iRdA Interface29 J14 Flash Interface 30 J18 Floppy Disk InterfaceConnecting the Piii to the Inova IPB-FPE8 31 CPU to IPB-FPE8 ConnectionConnecting the Piii to the Inova ICP-HD-1 CompactPCIConnecting the Piii to the Inova IPB-FPE12 33 CPU to IPB-FPE12 Connection34 CPU to IPB-FPE12 Connection Connecting the Piii to the ICP-FD-1 35 CPU to Slim-Line Floppy Disk ConnectionIPB-FPE8 A1.2 IPB-FPE8 & Front-panel 4HP or 8HP A1 IPB-FPE8 CPU ExtensionA1.1 J11 Interface for COM1, Mouse & Keyboard A1.3 Stand-Alone IPB-FPE8 Pin J11A1.4 IPB-FPE8MS Theme Variation DescriptionCompactPCI A1.5 IPB-FPE8MS DescriptionA1.6 Keyboard Interface A1.7 Mouse InterfaceCompactPCI A1.8 COM1 InterfaceThis page has been left blank intentionally PageA-8 ICP-HD B1.2 ICP-HD-1 & Front-panel 4HP or 8HP B1 ICP-HD CPU ExtensionB1.1 J11, J13 Interfaces B1.3 IDE Carrier Board ICP-HD-1 Figure B1.3 IDE Carrier Board ICP-HD1B1.4 ICP-HDE8MS Theme Variation Figure B1.4 IDE Carrier ICP-HDE8MSThen the COM2 on the IDE carriers B1.5 ICP-HDE8MS Description Figure B1.5 Top & Bottom Views of the ICP-HDE8MSB1.6 Keyboard Interface B1.7 Mouse InterfacePin No Signal RS232 B1.8 COM1 & COM 2 InterfacesIPM-ATA B1 IPM-ATA CPU Extension B1.1 J1 InterfacesB1.1 J1 Interfaces Contd KEYMaster Slave Compact FlashJumper J6 Master Jumper J7B1.4 IPM-ATA-PCMCIA Pcmcia Device in J5 Jumper J8 MasterB1.5 Device Compatibility Test Position Compact Flash Card Jumper ResultThis page has been left blank intentionally PageB-8 IPB-FPE12 C1.2 IPB-FPE12 & Front-panel 4HP or 12HP C1 IPB-FPE12 CPU ExtensionC1.1 J13 Interface for LPT1 & COM2 C1.3 LPT1 & COM2 Piggyback J13Table C1.3 IPB-FPE12 Connector Description C1.4 LPT1 Interface Figure C1.6 LPT1 Interface PinoutC1.5 COM2 Interface IPB-RIO Appendix D D1 IPB-RIO CPU ExtensionHard Disk J10 Hard Disk J9 D1.3 IPB-RIO-C-SHORT Rear I/O CD1.4 IPB-RIO-C-80MM This page has been left blank intentionally PageD-6