Inova ICP-PII user manual I/O Mapped Peripherals, Address Description

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ConfigurationICP-PIII

2.1 I/O Mapped Peripherals

The original PC-XT and PC-AT desktop computer (ISA bus) specification allows for 10-bit I/O addressed peripherals. This permits peripheral boards to be I/O mapped from 0h to 3FFh. CompactPCI systems permit the full 16-bit addressing capability of the Intel 80x86 ‘processors, from 0h to 0FFFFh.

All Inova CPU boards include peripheral devices requiring I/O address space on board and hence the BIOS automatically assigns the I/O address required by peripheral boards and PCI devices at boot time based on the requirements of each device. The assigned addresses can be determined by reading the configuration address space registers using special software tools.

Table 2.10 Legacy I/O Map (ISA Compatible)

I/O Address

 

 

Description

 

 

 

 

 

$000

- $00F

 

8237

DMA controller #1

 

 

 

 

 

$020

- $021

 

8259

Master Interrupt Controller

$040

- $043

 

8254 Programmable Interrupt Timer

 

 

 

 

 

$060

- $06F

 

8042

Keyboard Controller

$070 Ð $071

 

CMOS RAM, NMI Mask Reg., RTC

 

 

 

$080 - $08B

 

DMA page registers

$0A0

- $0BF

 

8259

Slave Interrupt Controller

 

 

 

 

$0C0 Ð $0DF

 

8237

DMA Controller #2

$0F0

 

Coprocessor Error Ignored Register

 

 

 

$170 - $177

*)

Secondary Hard Disk Controller

$1F0 - $1F8

*)

Primary Hard Disk Controller

 

 

 

$200 - $207

 

Reserved (Game Port)

$238 - $23B

 

Bus Mouse

 

 

 

 

$2E0

- $2E7

 

Reserved (GPIB)

$2E8

- $2EF

 

Reserved (Serial Port)

 

 

 

$2F8 - $2FF

*)

Serial Port (COM2)

$CF8

 

PCI Configuration Address

 

 

 

$CFC

 

PCI Configuration Data

 

 

 

 

 

Page2-4

©2002 Inova Computers GmbH

Doc. PD00581013.004

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Contents ICP-PIII USA Contents PrefaceICP-PIII CompactPCI Backplane A1 IPB-FPE8 CPU Extension B1 IPM-ATA CPU Extension Unpacking and Special Handling Instructions ICP-PIIIPreface Revision History Revision HistoryThree Year Limited Warranty Overview Contents ICP-PIII Interfacing PeripheralsSoftware GraphicsSpecifications Mobile PiiiCompactPCI Configuration CPU Family Processor CPU Speeds Multi-Processing PackageVGA Software LinuxVentureCom WindowsWindows CE VxWorks36 OS-9 37 QNXBlock Diagram HardwareConnector Description Connector LocationDescription Front-Panel Features Interface Description & Location44 Front-Panel Options Interface Positions 45 InterfacesConfiguration Con Tents ConfigurationICP-PIII Memory MapUMB Reservations for ISA Start Address Finish Address Port AddressingI/O Mapped Peripherals Address DescriptionMemory Mapped Peripherals Interrupt RoutingInterrupt Request Interrupt Vector Function/Assignment Inova Piii Device List Device Description PCI Interrupt Number RoutingInterrupt Configuration CompactPCITimer Function/Assignment Timer / CounterWatchdog This page has been left blank intentionally Page2-10 Interfaces Contents InterfacesICP-PIII CompactPCI Connector CompactPCI J1/J2 ConnectorICP-PIII Connector J1 and J2 Pin Nr Row a Row B Row C Row D Row E CompactPCI CLK6 GND CompactPCI CLK6 GND FWTPA+ Fwtpa HCS0# Rear I/O OptionCompactPCI Backplane 10 Inova’s 32-Bit CompactPCI 8-Slot Backplane RH System Slot Interfaces Pin No Signal21 J7 & J12 Fast Ethernet 22 J17 VGA Interface Resolution 256 16.7M Pin No Signal 23 J16 PanelLink Interface24 J16 GigaSTAR Interface 24 GigaSTAR D-Sub Interface Pinout 11 GigaSTAR Interface25 USB Interface Pinout 25 USB Connector Signals 25 J19 USB Interface26 J15 FireWire Interface 26 FireWire Interface Pinout 26 FireWire Connector Signals28 J20 Reset Button 27 J20 Infrared iRdA Interface29 J14 Flash Interface 30 J18 Floppy Disk InterfaceConnecting the Piii to the Inova IPB-FPE8 31 CPU to IPB-FPE8 ConnectionConnecting the Piii to the Inova ICP-HD-1 CompactPCIConnecting the Piii to the Inova IPB-FPE12 33 CPU to IPB-FPE12 Connection34 CPU to IPB-FPE12 Connection Connecting the Piii to the ICP-FD-1 35 CPU to Slim-Line Floppy Disk ConnectionIPB-FPE8 A1.1 J11 Interface for COM1, Mouse & Keyboard A1 IPB-FPE8 CPU ExtensionA1.2 IPB-FPE8 & Front-panel 4HP or 8HP A1.3 Stand-Alone IPB-FPE8 Pin J11A1.4 IPB-FPE8MS Theme Variation DescriptionCompactPCI A1.5 IPB-FPE8MS DescriptionA1.6 Keyboard Interface A1.7 Mouse InterfaceCompactPCI A1.8 COM1 InterfaceThis page has been left blank intentionally PageA-8 ICP-HD B1.1 J11, J13 Interfaces B1 ICP-HD CPU ExtensionB1.2 ICP-HD-1 & Front-panel 4HP or 8HP B1.3 IDE Carrier Board ICP-HD-1 Figure B1.3 IDE Carrier Board ICP-HD1B1.4 ICP-HDE8MS Theme Variation Figure B1.4 IDE Carrier ICP-HDE8MSThen the COM2 on the IDE carriers B1.5 ICP-HDE8MS Description Figure B1.5 Top & Bottom Views of the ICP-HDE8MSB1.6 Keyboard Interface B1.7 Mouse InterfacePin No Signal RS232 B1.8 COM1 & COM 2 InterfacesIPM-ATA B1 IPM-ATA CPU Extension B1.1 J1 InterfacesB1.1 J1 Interfaces Contd KEYJumper J6 Compact FlashMaster Slave Master Jumper J7B1.4 IPM-ATA-PCMCIA Pcmcia Device in J5 Jumper J8 MasterB1.5 Device Compatibility Test Position Compact Flash Card Jumper ResultThis page has been left blank intentionally PageB-8 IPB-FPE12 C1.1 J13 Interface for LPT1 & COM2 C1 IPB-FPE12 CPU ExtensionC1.2 IPB-FPE12 & Front-panel 4HP or 12HP C1.3 LPT1 & COM2 Piggyback J13Table C1.3 IPB-FPE12 Connector Description C1.4 LPT1 Interface Figure C1.6 LPT1 Interface PinoutC1.5 COM2 Interface IPB-RIO Appendix D D1 IPB-RIO CPU ExtensionHard Disk J10 Hard Disk J9 D1.3 IPB-RIO-C-SHORT Rear I/O CD1.4 IPB-RIO-C-80MM This page has been left blank intentionally PageD-6