1 • Introduction | Model 6511RC User Manual |
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RS-232 Config port
The
•Asynchronous data rates of 19.2 kbps, 8 data bits, no parity, 1 stop bit.
•An
•A management interface that supports
•Hardware flow control (RTS and CTS)
Power system
The 6511RC obtains power from the CPCI chassis via PCMG 2.11
Central processing unit
The 6511RC employs an Intel i960VH RISC processor operating at 100 MHz/100 Mips. The CPU controls the memory,
•4 MB Flash ROM
•8 MB EDO DRAM
System timing
The system timing for the Matrix Switch must be configured using the blade’s management services, typically via Web Management.
Clocking Mode
When configured in Master mode, the Matrix Switch serves as the Master clock source (timing reference) for all other blades on the same H.100 bus within the Model 6476 chassis or Model 6676 chassis segment. When configured in Backup mode, the Matrix Switch serves as an alternate Master clocking source (backup) should the Master clocking source fail. When configured in Slave mode, the Matrix Switch will not provide system timing over the H.100 bus for any other blades.
Clocking Source
Regardless of its clocking mode, the Matrix Switch can derive its own system timing from several sources. You will define two clocking sources for the Matrix Switch, a
•The internal oscillator (clock) residing on the Matrix Switch front blade
•A network clock recovered from the
•Another blade operating in either Primary or Secondary mode on the same bus.
26 | Hardware overview |