Sigma DE2-70 manual Video Capture Block Diagram

DE2-70 User Manual

JTAG

Blaster

Hardware

FPGA
SOPC
	System	SDRAM
NIOS II		Controller
TIMER		SDRAM
	Interconnect	Controller	VGA
			Controller
JTAG
			Multi - Port
	Fabric
			SSRAM
		Avalon	Controller
		MM Slave
			VIDEO-In
			Controller

Figure 4.4. Video Capture Block Diagram.

NIOS II

Program

SDRAM-U1

SDRAM-U2

VGA

SSRAM

VIDEO IN

The control flow for video displaying is described below:

1.Host computer downloads the raw image data to SDRAM-U2.

2.Host issues a “display” command to Nios II processor.

3.Nios II processor interprets the command received and moves the raw image data from the SDRAM to SSRAM through the Multi-Port SSRAM controller.

4.VGA Controller continuously reads the raw image data from the SSRAM and sends them to the VGA port.

The control flow for video capturing is described below:

1.Host computer issues a “capture” command to Nios II processor.

2.Nios II processor interprets the command and controls Video-In controller to capture the raw image data into the SSRAM. After capturing is done, Nios II processor copies the raw image data from the SSRAM to SDRAM-U2.

3.Host computer reads the raw image data from the SDRAM-U2

4.Host computer converts the raw image data to RGB color space and displays it.

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