Sigma DE2-70 manual JP1

Page 45

DE2-70 User Manual

1.8V 2.5V 3.3V

2 4 6

JP1

1 3 5

Figure 5.10. JP1 pin settings.

VCCIO5

VCCIO5

D12

 

D14

 

1

 

1

GPIO_D1

3

GPIO_D0

3

2

 

2

 

BAT54S

 

BAT54S

 

GPIO_D0

R51

47

IO_A0

GPIO_D1

R52

47

IO_A1

(protection registors and diodes not shown for other ports)

 

 

 

(GPIO 0)

 

 

 

J4

 

IO_CLKINn0

1

2

 

IO_CLKINp0

3

4

 

IO_A2

5

6

 

IO_A4

7

8

 

IO_A6

9

10

VCC5

IO_A8

11

12

13

14

 

 

IO_A10

15

16

 

IO_A12

17

18

 

IO_CLKOUTn0

19

20

 

IO_CLKOUTp0

21

22

 

IO_A16

 

23

24

 

IO_A18

25

26

 

IO_A20

27

28

VCC33

IO_A22

29

30

31

32

 

 

IO_A24

33

34

 

IO_A26

35

36

 

IO_A28

37

38

 

IO_A30

39

40

IO_A0

IO_A1

IO_A3

IO_A5 IO_A7

IO_A9 IO_A11 IO_A13 IO_A14

IO_A15

IO_A17 IO_A19

IO_A21

IO_A23 IO_A25 IO_A27

IO_A29

IO_A31

VCCIO5

VCCIO5

D48

 

D50

1

GPIO_D32

1

3

GPIO_D33

 

3

2

 

2

BAT54S

 

BAT54S

GPIO_D32

R60

47

IO_B0

GPIO_D33

R61

47

IO_B1

(protection registors and diodes not shown for other ports)

 

 

BOX Header 2X20M

 

 

 

(GPIO 1)

 

 

 

J5

 

IO_CLKINn1

1

2

 

IO_CLKINp1

3

4

 

IO_B2

5

6

 

IO_B4

7

8

 

IO_B6

9

10

VCC5

IO_B8

11

12

13

14

 

 

IO_B10

15

16

 

IO_B12

17

18

 

IO_CLKOUTn1

20

 

 

19

 

IO_CLKOUTp1

22

 

IO_B16

21

 

23

24

 

IO_B18

25

26

 

IO_B20

27

28

VCC33

IO_B22

29

30

31

32

 

 

IO_B24

33

34

 

IO_B26

35

36

 

IO_B28

37

38

 

IO_B30

39

40

IO_B0 IO_B1 IO_B3

IO_B5 IO_B7

IO_B9 IO_B11 IO_B13 IO_B14

IO_B15 IO_B17 IO_B19 IO_B21

IO_B23 IO_B25 IO_B27 IO_B29 IO_B31

BOX Header 2X20M

Figure 5.11. Schematic diagram of the expansion headers.

Signal Name

FPGA Pin No.

Description

 

 

 

IO_A [0]

PIN_C30

GPIO Connection 0 IO[0]

 

 

 

IO_A [1]

PIN_C29

GPIO Connection 0 IO[1]

 

 

 

IO_A [2]

PIN_E28

GPIO Connection 0 IO[2]

 

 

 

42

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Contents Copyright 2007 Terasic Technologies Contents Appendix DE2-70 Package Package ContentsFeet for the DE2-70 board DE2-70 Board AssemblyGetting Help Layout and Components Altera DE2-70 BoardBlock Diagram of the DE2-70 Board Cyclone II 2C70 Fpga Ssram Audio Codec Serial ports Power-up the DE2-70 BoardLCD display shows Welcome to the Altera DE2-70 DE2-70 Control Panel Control Panel SetupPage Controlling the LEDs, 7-Segment Displays and LCD Display Controlling 7-SEG display Switches and Buttons SDRAM/SSRAM/Flash Controller and Programmer Page USB Monitoring Press Load Memory Content to a File buttonUSB Mouse Monitoring Tool PS2 DeviceSD Card Audio Playing and Recording 10. Reading the SD card Identification and SpecificationPage Overall Structure of the DE2-70 Control Panel 13. The block diagram of the DE2-70 control panel DE2-70 Video Utility Video Utility SetupDE2-70 Video Utility window VGA DisplayDisplaying selected image file on VGA Monitor Video CaptureVideo Capturing Tool Overall Structure of the DE2-70 Video UtilityVideo Capture Block Diagram Configuring the Cyclone II Fpga Using the DE2-70 BoardFpga Switch debouncing Using the LEDs and SwitchesSchematic diagram of the pushbutton and toggle switches Schematic diagram of the LEDs Pin assignments for the toggle switches Schematic diagram of the 7-segment displays Using the 7-segment DisplaysPINAD10 Clock Circuitry Block diagram of the clock distribution Lcdon Using the LCD ModuleUsing the Expansion Header JP1 PIND29 Pin assignments for the expansion headers Rset Using VGA13. VGA horizontal timing specification 11. ADV7123 pin assignments I2C Address Read is 0x34 I2C Address Write is Using the 24-bit Audio Codec10 PS/2 Serial Port RS-232 Serial PortFast Ethernet Network Controller PS/2 schematic17. Fast Ethernet schematic TV Decoder 18. TV Decoder schematic Bit VGA DAC Implementing a TV EncoderOTGD15 OTGD14 OTGD13 OTGD12 OTGD11 OTGD10 Using USB Host and DeviceUsing IrDA IrDA schematic Using SDRAM/SRAM/Flash22. Sdram schematic 23. Ssram schematic PINAA4 DRAM0CKE PINAA8 19. Sdram pin assignments SRAMDQ8 PINAK17 20. Ssram pin assignments 21. Flash pin assignments Examples of Advanced Demonstrations DE2-70 Factory ConfigurationTV Box Demonstration Block diagram of the TV box demonstration TV Box Picture in Picture PIP Demonstration Setup for the TV box demonstrationBit stream used DE270TVPIP.sof or DE270TVPIP.pof Setup for the TV box PIP demonstration USB Paintbrush Block diagram of the USB paintbrush demonstration USB Device Setup for the USB paintbrush demonstrationBlock diagram of the USB device demonstration Karaoke Machine Setup for the USB device demonstrationBit stream used DE2-70i2sound.sof or DE2-70i2sound.pof Ethernet Packet Sending/Receiving 10. The setup for the Karaoke Machine11. Packet sending and receiving using the Nios II processor SD Card Music Player 12. The setup for the Ethernet demonstration13. Block diagram of the SD music player demonstration Demonstration Setup, File Locations, and Instructions Music Synthesizer Demonstration 16 illustrates the setup for this demonstration17 illustrates the setup for this demonstration Usage of the switches, pushbuttons KEYs PS/2 Keyboard 16. The Setup of the Music Synthesizer Demonstration Nios II IDE Audio Recording and PlayingSopc Toggle switch setting for audio recorder and player Copyright Statement Revision History
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