Sigma DE2-70 manual Block diagram of the SD music player demonstration

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DE2-70 User Manual

Figure 6.13 shows the hardware block diagram of this demonstration. The system requires a 50 MHZ clock provided from the board. The PLL generates a 100-MHZ clock for NIOS II processor and the other controllers except for the audio controller. The audio chip is controlled by the Audio Controller which is a user-defined SOPC component. This audio controller needs an input clock running at 18.432 MHZ. In this design, the clock is provided by the PLL block. The audio controller requires the audio chip working in master mode, so the serial bit (BCK) and the left/right channel clock (LRCK) are provided by the audio chip. The 7-segment display is controlled by the Seg-7 Controller which also is a user-defined SOPC component. Two PIO pins are connected to the I2C bus. The I2C protocol is implemented by software. Four PIO pins are connected to the SD CARD socket. SD 1-Bit Mode is used to access the SD card and is implemented by software. All of the other SOPC components in the block diagram are SOPC Builder built-in components.

Figure 6.13. Block diagram of the SD music player demonstration.

Figure 6.14 shows the software stack of this demonstration. SD 1-Bit Mod block implements the SD 1-bit mode protocol for reading raw data from the SD card. The FAT16 block implements FAT16 file system for reading wave files that stored in the SD card. In this block, only read function is implemented. The WAVE Lib block implements WAVE file decoding function for receiving audio signal from wave files. The I2C block implements I2C protocol for configuring audio chip. The SEG7 block implements displaying function for display elapsed playing time. The Audio block implements audio FIFO checking function and audio signal sending/receiving function.

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Contents Copyright 2007 Terasic Technologies Contents Appendix Package Contents DE2-70 PackageDE2-70 Board Assembly Feet for the DE2-70 boardGetting Help Altera DE2-70 Board Layout and ComponentsBlock Diagram of the DE2-70 Board Cyclone II 2C70 Fpga Ssram Audio Codec Power-up the DE2-70 Board Serial portsLCD display shows Welcome to the Altera DE2-70 Control Panel Setup DE2-70 Control PanelPage Controlling the LEDs, 7-Segment Displays and LCD Display Controlling 7-SEG display Switches and Buttons SDRAM/SSRAM/Flash Controller and Programmer Page Press Load Memory Content to a File button USB MonitoringPS2 Device USB Mouse Monitoring ToolSD Card 10. Reading the SD card Identification and Specification Audio Playing and RecordingPage Overall Structure of the DE2-70 Control Panel 13. The block diagram of the DE2-70 control panel Video Utility Setup DE2-70 Video UtilityVGA Display DE2-70 Video Utility windowVideo Capture Displaying selected image file on VGA MonitorOverall Structure of the DE2-70 Video Utility Video Capturing ToolVideo Capture Block Diagram Using the DE2-70 Board Configuring the Cyclone II FpgaFpga Using the LEDs and Switches Switch debouncingSchematic diagram of the pushbutton and toggle switches Schematic diagram of the LEDs Pin assignments for the toggle switches Using the 7-segment Displays Schematic diagram of the 7-segment displaysPINAD10 Clock Circuitry Block diagram of the clock distribution Using the LCD Module LcdonUsing the Expansion Header JP1 PIND29 Pin assignments for the expansion headers Using VGA Rset13. VGA horizontal timing specification 11. ADV7123 pin assignments Using the 24-bit Audio Codec I2C Address Read is 0x34 I2C Address Write isRS-232 Serial Port 10 PS/2 Serial PortPS/2 schematic Fast Ethernet Network Controller17. Fast Ethernet schematic TV Decoder 18. TV Decoder schematic Implementing a TV Encoder Bit VGA DACUsing USB Host and Device OTGD15 OTGD14 OTGD13 OTGD12 OTGD11 OTGD10Using IrDA Using SDRAM/SRAM/Flash IrDA schematic22. Sdram schematic 23. Ssram schematic PINAA4 DRAM0CKE PINAA8 19. Sdram pin assignments SRAMDQ8 PINAK17 20. Ssram pin assignments 21. Flash pin assignments DE2-70 Factory Configuration Examples of Advanced DemonstrationsTV Box Demonstration Block diagram of the TV box demonstration Setup for the TV box demonstration TV Box Picture in Picture PIP DemonstrationBit stream used DE270TVPIP.sof or DE270TVPIP.pof Setup for the TV box PIP demonstration USB Paintbrush Block diagram of the USB paintbrush demonstration Setup for the USB paintbrush demonstration USB DeviceBlock diagram of the USB device demonstration Setup for the USB device demonstration Karaoke MachineBit stream used DE2-70i2sound.sof or DE2-70i2sound.pof 10. The setup for the Karaoke Machine Ethernet Packet Sending/Receiving11. Packet sending and receiving using the Nios II processor 12. The setup for the Ethernet demonstration SD Card Music Player13. Block diagram of the SD music player demonstration Demonstration Setup, File Locations, and Instructions 16 illustrates the setup for this demonstration Music Synthesizer Demonstration17 illustrates the setup for this demonstration Usage of the switches, pushbuttons KEYs PS/2 Keyboard 16. The Setup of the Music Synthesizer Demonstration Audio Recording and Playing Nios II IDESopc Toggle switch setting for audio recorder and player Revision History Copyright Statement