Sigma manual Using the DE2-70 Board, Configuring the Cyclone II Fpga

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DE2-70 User Manual

Chapter 5

Using the DE2-70 Board

This chapter gives instructions for using the DE2-70 board and describes each of its I/O devices.

5.1 Configuring the Cyclone II FPGA

The procedure for downloading a circuit from a host computer to the DE2-70 board is described in the tutorial Quartus II Introduction. This tutorial is found in the DE2_70_tutorials folder on the DE2-70 System CD-ROM. The user is encouraged to read the tutorial first, and to treat the information below as a short reference.

The DE2-70 board contains a serial EEPROM chip that stores configuration data for the Cyclone II FPGA. This configuration data is automatically loaded from the EEPROM chip into the FPGA each time power is applied to the board. Using the Quartus II software, it is possible to reprogram the FPGA at any time, and it is also possible to change the non-volatile data that is stored in the serial EEPROM chip. Both types of programming methods are described below.

1.JTAG programming: In this method of programming, named after the IEEE standards Joint Test Action Group, the configuration bit stream is downloaded directly into the Cyclone II FPGA. The FPGA will retain this configuration as long as power is applied to the board; the configuration is lost when the power is turned off.

2.AS programming: In this method, called Active Serial programming, the configuration bit stream is downloaded into the Altera EPCS16 serial EEPROM chip. It provides non-volatile storage of the bit stream, so that the information is retained even when the power supply to the DE2-70 board is turned off. When the board's power is turned on, the configuration data in the EPCS16 device is automatically loaded into the Cyclone II FPGA.

The sections below describe the steps used to perform both JTAG and AS programming. For both methods the DE2-70 board is connected to a host computer via a USB cable. Using this connection, the board will be identified by the host computer as an Altera USB Blaster device. The process for installing on the host computer the necessary software device driver that communicates with the USB Blaster is described in the tutorial Getting Started with Altera's DE2-70 Board. This tutorial is available on the DE2-70 System CD-ROM.

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Contents Copyright 2007 Terasic Technologies Contents Appendix DE2-70 Package Package ContentsFeet for the DE2-70 board DE2-70 Board AssemblyGetting Help Layout and Components Altera DE2-70 BoardBlock Diagram of the DE2-70 Board Cyclone II 2C70 Fpga Ssram Audio Codec Serial ports Power-up the DE2-70 BoardLCD display shows Welcome to the Altera DE2-70 DE2-70 Control Panel Control Panel SetupPage Controlling the LEDs, 7-Segment Displays and LCD Display Controlling 7-SEG display Switches and Buttons SDRAM/SSRAM/Flash Controller and Programmer Page USB Monitoring Press Load Memory Content to a File buttonUSB Mouse Monitoring Tool PS2 DeviceSD Card Audio Playing and Recording 10. Reading the SD card Identification and SpecificationPage Overall Structure of the DE2-70 Control Panel 13. The block diagram of the DE2-70 control panel DE2-70 Video Utility Video Utility SetupDE2-70 Video Utility window VGA DisplayDisplaying selected image file on VGA Monitor Video CaptureVideo Capturing Tool Overall Structure of the DE2-70 Video UtilityVideo Capture Block Diagram Configuring the Cyclone II Fpga Using the DE2-70 BoardFpga Switch debouncing Using the LEDs and SwitchesSchematic diagram of the pushbutton and toggle switches Schematic diagram of the LEDs Pin assignments for the toggle switches Schematic diagram of the 7-segment displays Using the 7-segment DisplaysPINAD10 Clock Circuitry Block diagram of the clock distribution Lcdon Using the LCD ModuleUsing the Expansion Header JP1 PIND29 Pin assignments for the expansion headers Rset Using VGA13. VGA horizontal timing specification 11. ADV7123 pin assignments I2C Address Read is 0x34 I2C Address Write is Using the 24-bit Audio Codec10 PS/2 Serial Port RS-232 Serial PortFast Ethernet Network Controller PS/2 schematic17. Fast Ethernet schematic TV Decoder 18. TV Decoder schematic Bit VGA DAC Implementing a TV EncoderOTGD15 OTGD14 OTGD13 OTGD12 OTGD11 OTGD10 Using USB Host and DeviceUsing IrDA IrDA schematic Using SDRAM/SRAM/Flash22. Sdram schematic 23. Ssram schematic PINAA4 DRAM0CKE PINAA8 19. Sdram pin assignments SRAMDQ8 PINAK17 20. Ssram pin assignments 21. Flash pin assignments Examples of Advanced Demonstrations DE2-70 Factory ConfigurationTV Box Demonstration Block diagram of the TV box demonstration TV Box Picture in Picture PIP Demonstration Setup for the TV box demonstrationBit stream used DE270TVPIP.sof or DE270TVPIP.pof Setup for the TV box PIP demonstration USB Paintbrush Block diagram of the USB paintbrush demonstration USB Device Setup for the USB paintbrush demonstrationBlock diagram of the USB device demonstration Karaoke Machine Setup for the USB device demonstrationBit stream used DE2-70i2sound.sof or DE2-70i2sound.pof Ethernet Packet Sending/Receiving 10. The setup for the Karaoke Machine11. Packet sending and receiving using the Nios II processor SD Card Music Player 12. The setup for the Ethernet demonstration13. Block diagram of the SD music player demonstration Demonstration Setup, File Locations, and Instructions Music Synthesizer Demonstration 16 illustrates the setup for this demonstration17 illustrates the setup for this demonstration Usage of the switches, pushbuttons KEYs PS/2 Keyboard 16. The Setup of the Music Synthesizer Demonstration Nios II IDE Audio Recording and PlayingSopc Toggle switch setting for audio recorder and player Copyright Statement Revision History