Sigma DE2-70 manual Fast Ethernet schematic

Page 54

DE2-70 User Manual

N_VCC33

NGND

L1

BEAD

N_VCC33

R72 4.7K

25MHZ ENET_RESET_n SPEED ACT ENET_CS_n

 

 

 

 

 

 

 

 

ENET_D[0..15]

 

 

 

 

 

 

J6

 

15

16

 

 

 

 

 

N_VCC25

L2

 

11

 

 

 

 

 

 

 

 

 

 

 

MNT1

MNT0

 

 

 

 

 

 

 

D3

 

 

2

 

 

 

 

 

 

 

 

 

 

TD+

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

N_VCC33

12

 

 

 

 

TD-

4

N_VCC25

 

 

 

 

D4 YELLOW

 

 

CTT

 

 

 

 

 

 

 

5

 

 

 

 

 

 

 

 

 

 

CTR

 

 

 

 

 

 

 

 

 

 

 

3

 

 

 

 

 

 

10

 

 

 

 

RD+

 

 

 

 

 

 

 

 

 

 

6

 

 

 

 

 

 

D2

 

NT1SM

NT0SM

RD-

 

 

 

 

 

 

 

GREEN

 

 

 

 

 

 

 

9

D1

CHSG

8

 

R73

R74

R75

R76

 

 

 

 

 

 

N_VCC33

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RJ45INTLED

14

13

 

 

CHSGND

49.9

49.9

49.9

49.9

 

 

 

 

 

 

 

 

 

 

 

CHSGND

 

C18

C19

 

 

0.1u

0.1u

 

 

NGND

NGND

R77

120

SPEED

 

R78

120

ACT

 

C17

BC36

BC37

R70

U9

48 47 46 45 44 43 42 41 40 39 38 37

 

 

 

 

 

 

 

N_VCC33

 

 

 

 

 

 

BGGND RXGND SD GND X1 X2 VDD TEST RST#PW LED1 LED2 CS#

 

 

 

10u

0.1u

0.1u

6.8K

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R71

 

 

 

 

 

 

 

 

 

4.7K

 

 

 

 

1

BGRES

 

IOW#

36

ENET_IOW_n

 

BEAD

 

 

2

 

35

ENET_IOR_n

 

 

 

RXVDD25

 

IOR#

 

RX+

 

 

3

 

34

ENET_INT

 

 

 

RX+

 

INT

 

RX-

 

 

4

 

33

 

 

 

 

RX-

 

GND

ENET_CMD

 

 

NGND

 

5

 

32

 

 

 

RXGND

 

CMD

 

 

 

6

 

31

ENET_D8

 

TX+

 

 

TXGND

DM9000A-8/16bit

GP1/SD8

 

 

 

7

30

 

N_VCC33

 

 

TX+

VDD

ENET_D9

TX-

 

 

8

29

 

 

TX-

 

GP2/SD9

 

 

 

 

9

DM9000AE

28

ENET_D10

 

 

 

 

TXVDD25

GP3/SD10

 

 

 

 

10

 

27

ENET_D11

 

 

 

 

SD7

 

GP4/SD11

 

 

 

 

11

 

26

ENET_D12

 

 

 

 

SD6

 

GP5/SD12

 

 

 

 

12

 

25

ENET_D13

 

 

 

 

SD5

 

GP6/SD13

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SD4 SD3 GND SD2 SD1 SD0 EEDIO EEDCK EEDCS AKE/SD15 VDD LED3/SD14 W

 

 

 

 

 

 

 

 

 

13 14 15 16 17 18 19 20 21 22 23 24

 

 

 

 

 

 

 

 

 

 

 

 

ENET_D14

N_VCC33

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ENET_D15

 

 

 

 

 

 

 

 

 

ENET_D0

 

 

 

 

 

 

 

 

 

ENET_D1

 

 

 

 

 

 

 

 

 

ENET_D2

 

 

 

 

 

 

 

 

 

ENET_D3

 

 

 

 

 

 

 

 

 

ENET_D4

 

 

 

 

 

 

 

 

 

ENET_D5

 

 

 

 

 

 

 

 

 

ENET_D6

 

 

 

 

 

 

 

 

 

ENET_D7

 

Figure 5.17. Fast Ethernet schematic.

Signal Name

FPGA Pin No.

Description

 

 

 

ENET_DATA[0]

PIN_A23

DM9000A DATA[0]

 

 

 

ENET_DATA[1]

PIN_C22

DM9000A DATA[1]

 

 

 

ENET_DATA[2]

PIN_B22

DM9000A DATA[2]

 

 

 

ENET_DATA[3]

PIN_A22

DM9000A DATA[3]

 

 

 

ENET_DATA[4]

PIN_B21

DM9000A DATA[4]

 

 

 

ENET_DATA[5]

PIN_A21

DM9000A DATA[5]

 

 

 

ENET_DATA[6]

PIN_B20

DM9000A DATA[6]

 

 

 

ENET_DATA[7]

PIN_A20

DM9000A DATA[7]

 

 

 

ENET_DATA[8]

PIN_B26

DM9000A DATA[8]

 

 

 

ENET_DATA[9]

PIN_A26

DM9000A DATA[9]

 

 

 

ENET_DATA[10]

PIN_B25

DM9000A DATA[10]

 

 

 

ENET_DATA[11]

PIN_A25

DM9000A DATA[11]

 

 

 

ENET_DATA[12]

PIN_C24

DM9000A DATA[12]

 

 

 

ENET_DATA[13]

PIN_B24

DM9000A DATA[13]

 

 

 

ENET_DATA[14]

PIN_A24

DM9000A DATA[14]

 

 

 

ENET_DATA[15]

PIN_B23

DM9000A DATA[15]

 

 

 

ENET_CLK

PIN_D27

DM9000A Clock 25 MHz

 

 

 

ENET_CMD

PIN_B27

DM9000A Command/Data Select, 0 = Command, 1 = Data

 

 

 

 

 

51

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Page 53 Page 55
Contents Copyright 2007 Terasic Technologies Contents Appendix Package Contents DE2-70 PackageDE2-70 Board Assembly Feet for the DE2-70 boardGetting Help Altera DE2-70 Board Layout and ComponentsBlock Diagram of the DE2-70 Board Cyclone II 2C70 Fpga Ssram Audio Codec Power-up the DE2-70 Board Serial portsLCD display shows Welcome to the Altera DE2-70 Control Panel Setup DE2-70 Control PanelPage Controlling the LEDs, 7-Segment Displays and LCD Display Controlling 7-SEG display Switches and Buttons SDRAM/SSRAM/Flash Controller and Programmer Page Press Load Memory Content to a File button USB MonitoringPS2 Device USB Mouse Monitoring ToolSD Card 10. Reading the SD card Identification and Specification Audio Playing and RecordingPage Overall Structure of the DE2-70 Control Panel 13. The block diagram of the DE2-70 control panel Video Utility Setup DE2-70 Video UtilityVGA Display DE2-70 Video Utility windowVideo Capture Displaying selected image file on VGA MonitorOverall Structure of the DE2-70 Video Utility Video Capturing ToolVideo Capture Block Diagram Using the DE2-70 Board Configuring the Cyclone II FpgaFpga Using the LEDs and Switches Switch debouncingSchematic diagram of the pushbutton and toggle switches Schematic diagram of the LEDs Pin assignments for the toggle switches Using the 7-segment Displays Schematic diagram of the 7-segment displaysPINAD10 Clock Circuitry Block diagram of the clock distribution Using the LCD Module LcdonUsing the Expansion Header JP1 PIND29 Pin assignments for the expansion headers Using VGA Rset13. VGA horizontal timing specification 11. ADV7123 pin assignments Using the 24-bit Audio Codec I2C Address Read is 0x34 I2C Address Write isRS-232 Serial Port 10 PS/2 Serial PortPS/2 schematic Fast Ethernet Network Controller17. Fast Ethernet schematic TV Decoder 18. TV Decoder schematic Implementing a TV Encoder Bit VGA DACUsing USB Host and Device OTGD15 OTGD14 OTGD13 OTGD12 OTGD11 OTGD10Using IrDA Using SDRAM/SRAM/Flash IrDA schematic22. Sdram schematic 23. Ssram schematic PINAA4 DRAM0CKE PINAA8 19. Sdram pin assignments SRAMDQ8 PINAK17 20. Ssram pin assignments 21. Flash pin assignments DE2-70 Factory Configuration Examples of Advanced DemonstrationsTV Box Demonstration Block diagram of the TV box demonstration Setup for the TV box demonstration TV Box Picture in Picture PIP DemonstrationBit stream used DE270TVPIP.sof or DE270TVPIP.pof Setup for the TV box PIP demonstration USB Paintbrush Block diagram of the USB paintbrush demonstration Setup for the USB paintbrush demonstration USB DeviceBlock diagram of the USB device demonstration Setup for the USB device demonstration Karaoke MachineBit stream used DE2-70i2sound.sof or DE2-70i2sound.pof 10. The setup for the Karaoke Machine Ethernet Packet Sending/Receiving11. Packet sending and receiving using the Nios II processor 12. The setup for the Ethernet demonstration SD Card Music Player13. Block diagram of the SD music player demonstration Demonstration Setup, File Locations, and Instructions 16 illustrates the setup for this demonstration Music Synthesizer Demonstration17 illustrates the setup for this demonstration Usage of the switches, pushbuttons KEYs PS/2 Keyboard 16. The Setup of the Music Synthesizer Demonstration Audio Recording and Playing Nios II IDESopc Toggle switch setting for audio recorder and player Revision History Copyright Statement
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