Cypress CY7C64215 manual Supply Voltage Rejection Ratio, DC Analog Reference Specifications, P24

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CY7C64215

 

 

 

 

 

 

 

 

 

 

Table 12. 3.3V DC Analog Output Buffer Specifications

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

Description

Min

Typ

Max

Unit

Notes

 

 

VOSOB

Input Offset Voltage (Absolute Value)

3

12

mV

 

 

 

TCVOSOB

Average Input Offset Voltage Drift

+6

μV/°C

 

 

 

VCMOB

Common-Mode Input Voltage Range

0.5

-

Vdd - 1.0

V

 

 

 

ROUTOB

Output Resistance

1

W

 

 

 

 

Power = Low

 

 

 

 

Power = High

1

W

 

 

 

VOHIGHOB

High Output Voltage Swing

 

 

 

 

 

 

 

 

(Load = 1K ohms to Vdd/2)

 

 

 

 

 

 

 

 

Power = Low

0.5 x Vdd + 1.0

V

 

 

 

 

Power = High

0.5 x Vdd + 1.0

V

 

 

 

VOLOWOB

Low Output Voltage Swing

 

 

 

 

 

 

 

 

(Load = 1K ohms to Vdd/2)

 

 

 

 

 

 

 

 

Power = Low

0.5 x Vdd – 1.0

V

 

 

 

 

Power = High

0.5 x Vdd – 1.0

V

 

 

 

ISOB

Supply Current Including Bias Cell (No Load)

 

0.8

2.0

mA

 

 

 

 

Power = Low

 

 

 

 

 

Power = High

2.0

4.3

mA

 

 

 

PSRROB

Supply Voltage Rejection Ratio

34

64

dB

(0.5 x Vdd – 1.0) < VOUT

 

 

 

 

 

 

 

 

 

 

< (0.5 x Vdd + 0.9).

 

DC Analog Reference Specifications

The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and 0°C < TA < 70°C, or 3.0V to 3.6V and 0°C < TA < 70°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and are for design guidance only.

Table 13. 5V DC Analog Reference Specifications

Parameter

Description

Min

Typ

Max

Unit

BG

Bandgap Voltage Reference

1.28

1.30

1.32

V

AGND = Vdd/2[3]

Vdd/2 – 0.04

Vdd/2 – 0.01

Vdd/2 + 0.007

V

AGND = 2 x BandGap[3]

2 x BG – 0.048

2 x BG – 0.030

2 x BG + 0.024

V

AGND = P2[4] (P2[4] = Vdd/2)[3]

P2[4] – 0.011

P2[4]

P2[4] + 0.011

V

AGND = BandGap[3]

BG – 0.009

BG + 0.008

BG + 0.016

V

AGND = 1.6 x BandGap[3]

1.6 x BG – 0.022

1.6 x BG – 0.010

1.6 x BG + 0.018

V

AGND Block to Block Variation

–0.034

0.000

0.034

V

(AGND = Vdd/2)[3]

 

 

 

 

RefHi = Vdd/2 + BandGap

Vdd/2 + BG – 0.10

Vdd/2 + BG

Vdd/2 + BG + 0.10

V

RefHi = 3 x BandGap

3 x BG – 0.06

3 x BG

3 x BG + 0.06

V

RefHi = 2 x BandGap + P2[6] (P2[6] = 1.3V)

2 x BG + P2[6] – 0.113

2 x BG + P2[6] – 0.018

2 x BG + P2[6] + 0.077

V

RefHi = P2[4] + BandGap (P2[4] = Vdd/2)

P2[4] + BG – 0.130

P2[4] + BG – 0.016

P2[4] + BG + 0.098

V

RefHi = P2[4] + P2[6] (P2[4] = Vdd/2, P2[6]

P2[4] + P2[6] – 0.133

P2[4] + P2[6] – 0.016

P2[4] + P2[6]+ 0.100

V

= 1.3V)

 

 

 

 

RefHi = 3.2 x BandGap

3.2 x BG – 0.112

3.2 x BG

3.2 x BG + 0.076

V

RefLo = Vdd/2 – BandGap

Vdd/2 – BG – 0.04

Vdd/2 – BG + 0.024

Vdd/2 – BG + 0.04

V

RefLo = BandGap

BG – 0.06

BG

BG + 0.06

V

RefLo = 2 x BandGap – P2[6] (P2[6] = 1.3V)

2 x BG – P2[6] – 0.084

2 x BG – P2[6] + 0.025

2 x BG – P2[6] + 0.134

V

RefLo = P2[4] – BandGap (P2[4] = Vdd/2)

P2[4] – BG – 0.056

P2[4] – BG + 0.026

P2[4] – BG + 0.107

V

RefLo = P2[4]-P2[6] (P2[4] = Vdd/2, P2[6] =

P2[4] – P2[6] – 0.057

P2[4] – P2[6] + 0.026

P2[4] – P2[6] + 0.110

V

1.3V)

 

 

 

 

Note

3. AGND tolerance includes the offsets of the local buffer in the enCoRe III block. Bandgap voltage is 1.3V ± 0.02V.

Document 38-08036 Rev. *C

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Contents Block Diagram FeaturesCypress Semiconductor Corporation 198 Champion Court San Jose, CA Document 38-08036 Rev. *C Revised December 08EnCoRe III Functional Overview ApplicationsEnCoRe III Core Digital SystemEnCoRe III Device Characteristics EnCoRe III Device CharacteristicsGetting Started Additional System ResourcesDevelopment Kits Development ToolsPSoC Designer Software Subsystems Device EditorHardware Tools Designing with User ModulesApplicationEditor DeviceEditorDebugger Generate ApplicationAcronyms Used Document ConventionsUnits of Measure Numeric NamingPin Part Pinout MLF CY7C64215 56-Pin enCoRe III Device Pin Part PinoutCY7C64215 28-Pin enCoRe III Device Pin Part Pinout SsopP07 Analog column mux input P05 Analog column mux input and column OutputRegister Conventions Description Register ReferenceRegister Mapping Tables Register Map Bank 0 Table User Space Name Addr 0,Hex AccessName Addr Access Hex Register Map Bank 1 Table Configuration SpaceUnits of Measure Symbol Unit of Measure Electrical SpecificationsAbsolute Maximum Ratings Parameter Description Min Typ Unit Operating TemperatureAbsolute Maximum Ratings DC General Purpose IO Specifications DC Electrical CharacteristicsDC Chip-Level Specifications DC Analog Output Buffer Specifications DC Full-Speed USB SpecificationsP24 DC Analog Reference SpecificationsSupply Voltage Rejection Ratio Resistor Unit Value Continuous Time 12.2 DC Analog enCoRe III Block SpecificationsRefHi = P24 + P26 P24 = Vdd/2, P26 = P24 + P26 + P24 P26 P24 P26 +DC POR and LVD Specifications DC Programming Specifications AC Chip-Level Specifications AC Electrical CharacteristicsAC Full-Speed USB Specifications AC General Purpose IO SpecificationsAC External Clock Specifications AC Digital Block SpecificationsMHz Power = Low Power = High AC Analog Output Buffer SpecificationsLarge Signal Bandwidth, 1Vpp, 3-dB BW, 100 pF Load KHz Power = Low Power = HighAC I2C Specifications AC Programming SpecificationsSDA Packaging Information Package DiagramsThermal Impedance for the Package Typical θ JA Solder Reflow Peak TemperatureThermal Impedance Ordering Information Package HandlingParameter Description Min Typical Max Unit Ordering Code Flash Size Sram BytesWorldwide Sales and Design Support Products PSoC Solutions Sales, Solutions, and Legal Information