CY7C64215
AC Electrical Characteristics
AC Chip-Level Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and 0°C < TA < 70°C, or 3.0V to 3.6V and 0°C < TA < 70°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and are for design guidance only.
Table 18. AC
Parameter | Description | Min | Typ | Max | Unit | Notes |
F | Internal Main Oscillator Frequency for 24 MHz | 23.04 | 24 | 24.96[7, 8] | MHz | Trimmed for 5V operation using |
IMO245V | (5V) |
|
|
|
| factory trim values. |
|
|
|
|
| ||
FIMO243V | Internal Main Oscillator Frequency for 24 MHz | 22.08 | 24 | 25.92[7,9] | MHz | Trimmed for 3.3V operation |
| (3.3V) |
|
|
|
| using factory trim values. |
FIMOUSB | Internal Main Oscillator Frequency with USB | 23.94 | 24 | 24.06[8] | MHz | 0°C < TA < 70°C |
| Frequency locking enabled and USB traffic |
|
|
|
|
|
| present. |
|
|
|
|
|
FCPU1 | CPU Frequency (5V Nominal) | 0.93 | 24 | 24.96[7,8] | MHz |
|
F | CPU Frequency (3.3V Nominal) | 0.93 | 12 | 12.96[8, 9] | MHz |
|
CPU2 |
|
|
|
|
|
|
F | Digital PSoC Block Frequency (5V Nominal) | 0 | 48 | 49.92[7, 8, | MHz | Refer to the AC Digital Block |
BLK5 |
|
|
| 10] |
| Specifications. |
|
|
|
|
| ||
FBLK3 | Digital PSoC Block Frequency (3.3V Nominal) | 0 | 24 | 25.92[8, 10] | MHz |
|
F32K1 | Internal Low Speed Oscillator Frequency | 15 | 32 | 64 | kHz |
|
Jitter32k | 32 kHz Period Jitter | – | 100 |
| ns |
|
Step24M | 24 MHz Trim Step Size | – | 50 | – | kHz |
|
Fout48M | 48 MHz Output Frequency | 46.08 | 48.0 | 49.92[7, 9] | MHz | Trimmed. Utilizing factory trim |
|
|
|
|
|
| values. |
Jitter24M1 | 24 MHz Period Jitter (IMO) | – | 300 |
| ps |
|
FMAX | Maximum frequency of signal on row input or | – | – | 12.96 | MHz |
|
| row output. |
|
|
|
|
|
TRAMP | Supply Ramp Time | 0 | – | – | μs |
|
Figure 6. 24 MHz Period Jitter (IMO) Timing Diagram
Jitter24M1
F24M
Notes
7.4.75V < Vdd < 5.25V.
8.Accuracy derived from Internal Main Oscillator with appropriate trim for Vdd range.
9.3.0V < Vdd < 3.6V. See Application Note AN2012 “Adjusting PSoC Microcontroller Trims for Dual
10.See the individual user module data sheets for information on maximum frequencies for user modules.
Document | Page 21 of 30 |
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