CY7C64215
enCoRe™ III Full Speed USB Controller
Features
■Powerful Harvard Architecture Processor
❐M8C Processor Speeds to 24 MHz
❐Two 8x8 Multiply,
❐3.0V to 5.25V Operating Voltage
❐USB 2.0
❐Operating Temperature Range: 0°C to +70°C
■Advanced Peripherals (enCoRe™ III Blocks)
❐6 Analog enCoRe III Blocks provide:
•Up to
❐Programmable Threshold Comparator
❐4 Digital enCoRe III Blocks provide:
•
•I2C Master
•SPI Master or Slave
•Full Duplex UART
•CYFISNP and CYFISPI modules to talk to Cypress CYFI radio
■Complex Peripherals by Combining Blocks
■
❐Four Unidirectional Endpoints
❐One Bidirectional Control Endpoint
❐Dedicated 256 Byte Buffer
❐No External Crystal Required
❐Operational at 3.0V – 3.6V or 4.35V – 5.25V
■Flexible
❐16K Flash Program Storage 50,000 Erase/Write Cycles
❐1K SRAM Data Storage
❐
❐Partial Flash Updates
❐Flexible Protection Modes
❐EEPROM Emulation in Flash
■Programmable Pin Configurations
❐
❐Pull up, Pull down, High- Z, Strong, or Open Drain Drive Modes on all GPIO
❐Configurable Interrupt on all GPIO
■Precision, Programmable Clocking
❐Internal ±4% 24 and 48 MHz Oscillator
❐Internal Oscillator for Watchdog and Sleep
❐0.25% Accuracy for USB with no External Components
■Additional System Resources
❐I2C™ Slave, Master, and
❐Watchdog and Sleep Timers
❐
❐Integrated Supervisory Circuit
❐
■Complete Development Tools
❐Free Development Software (PSoC® Designer™)
❐
❐Full Speed Emulation
❐Complex Breakpoint Structure
❐128K Bytes Trace Memory
Block Diagram
enCoRe III Core
Cypress Semiconductor Corporation • 198 Champion Court | • | San Jose, CA | • | |
Document |
| Revised December 08, 2008 |
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