Cypress CY7C64215 manual Designing with User Modules, Hardware Tools

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Application Editor

CY7C64215

Designing with User Modules

In the Application Editor you can edit your C language and Assembly language source code. You can also assemble, compile, link, and build.

Assembler. The macro assembler allows the assembly code to merge seamlessly with C code. The link libraries automatically use absolute addressing or is compiled in relative mode, and linked with other software modules to get absolute addressing.

C Language Compiler. A C language compiler is available that supports the enCoRe III family of devices. Even if you have never worked in the C language before, the product quickly allows you to create complete C programs for the enCoRe III devices.

The embedded, optimizing C compiler provides all the features of C tailored to the enCoRe III architecture. It comes complete with embedded libraries providing port and bus operations, standard keypad and display support, and extended math functionality.

Debugger

The PSoC Designer Debugger subsystem provides hardware in-circuit emulation, allowing the designer to test the program in a physical system while providing an internal view of the enCoRe

IIIdevice. Debugger commands allow the designer to read and program and read and write data memory, read and write IO registers, read and write CPU registers, set and clear break- points, and provide program run, halt, and step control. The debugger also allows the designer to create a trace buffer of registers and memory locations of interest.

Online Help System

The online help system displays online, context-sensitive help for the user. Designed for procedural and quick reference, each functional subsystem has its own context-sensitive help. This system also provides tutorials and links to FAQs and an Online Support Forum to aid the designer in getting started.

Hardware Tools

In-Circuit Emulator

A low cost, high functionality ICE Cube is available for devel- opment support. This hardware has the capability to program single devices.

The emulator consists of a base unit that connects to the PC by way of a USB port. The base unit is universal which operates with all enCoRe III devices.

The development process for the enCoRe III device differs from that of a traditional fixed-function microprocessor. The config- urable analog and digital hardware blocks give the enCoRe III architecture a unique flexibility that pays dividends in managing specification change during development and by lowering inventory costs. These configurable resources, called enCoRe

IIIBlocks, have the ability to implement a wide variety of user-selectable functions. Each block has several registers that determine its function and connectivity to other blocks, multi- plexers, buses and to the IO pins. Iterative development cycles permit you to adapt the hardware and software. This substan- tially lowers the risk of having to select a different part to meet the final design requirements.

To speed the development process, the PSoC Designer Integrated Development Environment (IDE) provides a library of pre-built, pre-tested hardware peripheral functions, called “User Modules.” User modules make selecting and implementing peripheral devices simple, and come in analog, digital, and mixed signal varieties.

The user module library contains the following digital and analog module designs:

Analog Blocks

Incremental ADC (ADCINC)

Delta Sigma ADC (DelSig)

Programmable Threshold Comparator (CMPPRG)

Digital Blocks

Counters: 8-bit and 16-bit (Counter8 and Counter 16)

PWMs: 8-bit and 16-bit (PWM8 and PWM16)

Timers: 8-bit and 16-bit (Timer8 and Timer 16)

I2C Master (I2Cm)

SPI Master (SPIM)

SPI Slave (SPIS)

Full Duplex UART (UART)

RF (CYFISNP and CYFISPI)

System Resources

Protocols:

USBFS

I2C Bootheader (Boothdr I2C)

USB Bootheader (BoothdrUSBFS)

USBUART

Digital System Resources

E2PROM

LCD

LED

7-segment LED (LED7SEG)

Shadow Registers (SHADOWREG)

Sleep Timer

Document 38-08036 Rev. *C

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Contents Block Diagram FeaturesCypress Semiconductor Corporation 198 Champion Court San Jose, CA Document 38-08036 Rev. *C Revised December 08EnCoRe III Functional Overview ApplicationsEnCoRe III Core Digital SystemEnCoRe III Device Characteristics EnCoRe III Device CharacteristicsGetting Started Additional System ResourcesDevelopment Kits Development ToolsPSoC Designer Software Subsystems Device EditorHardware Tools Designing with User ModulesApplicationEditor DeviceEditorDebugger Generate ApplicationAcronyms Used Document ConventionsUnits of Measure Numeric NamingPin Part Pinout MLF CY7C64215 56-Pin enCoRe III Device Pin Part PinoutCY7C64215 28-Pin enCoRe III Device Pin Part Pinout SsopP07 Analog column mux input P05 Analog column mux input and column OutputRegister Conventions Description Register ReferenceRegister Mapping Tables Register Map Bank 0 Table User Space Name Addr 0,Hex AccessName Addr Access Hex Register Map Bank 1 Table Configuration SpaceUnits of Measure Symbol Unit of Measure Electrical SpecificationsAbsolute Maximum Ratings Parameter Description Min Typ Unit Operating TemperatureAbsolute Maximum Ratings DC General Purpose IO Specifications DC Electrical CharacteristicsDC Chip-Level Specifications DC Analog Output Buffer Specifications DC Full-Speed USB SpecificationsP24 DC Analog Reference SpecificationsSupply Voltage Rejection Ratio Resistor Unit Value Continuous Time 12.2 DC Analog enCoRe III Block SpecificationsRefHi = P24 + P26 P24 = Vdd/2, P26 = P24 + P26 + P24 P26 P24 P26 +DC POR and LVD Specifications DC Programming Specifications AC Chip-Level Specifications AC Electrical CharacteristicsAC Full-Speed USB Specifications AC General Purpose IO SpecificationsAC External Clock Specifications AC Digital Block SpecificationsMHz Power = Low Power = High AC Analog Output Buffer SpecificationsLarge Signal Bandwidth, 1Vpp, 3-dB BW, 100 pF Load KHz Power = Low Power = HighAC I2C Specifications AC Programming SpecificationsSDA Packaging Information Package DiagramsThermal Impedance for the Package Typical θ JA Solder Reflow Peak TemperatureThermal Impedance Ordering Information Package HandlingParameter Description Min Typical Max Unit Ordering Code Flash Size Sram BytesWorldwide Sales and Design Support Products PSoC Solutions Sales, Solutions, and Legal Information