Cypress CY7C64215 manual DC POR and LVD Specifications

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CY7C64215

DC POR and LVD Specifications

The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and 0°C < TA < 70°C, or 3.0V to 3.6V and 0°C < TA < 70°C, respectively. Typical parameters apply to 5V or 3.3V at 25°C and are for design guidance only.

Note The bits PORLEV and VM in the table below refer to bits in the VLT_CR register. See the PSoC Mixed-Signal Array Technical Reference Manual for more information on the VLT_CR register.

Table 16. DC POR and LVD Specifications

Parameter

Description

Min

Typ

Max

Unit

Notes

 

Vdd Value for PPOR Trip (positive ramp)

 

 

 

 

 

VPPOR0R

PORLEV[1:0] = 00b

 

2.91

 

V

 

VPPOR1R

PORLEV[1:0] = 01b

4.39

V

 

VPPOR2R

PORLEV[1:0] = 10b

 

4.55

 

V

 

VPPOR0

Vdd Value for PPOR Trip (negative ramp)

 

 

 

 

 

PORLEV[1:0] = 00b

 

2.82

 

V

 

VPPOR1

PORLEV[1:0] = 01b

4.39

V

 

VPPOR2

PORLEV[1:0] = 10b

 

4.55

 

V

 

 

PPOR Hysteresis

 

 

 

 

 

VPH0

PORLEV[1:0] = 00b

92

mV

 

VPH1

PORLEV[1:0] = 01b

0

mV

 

VPH2

PORLEV[1:0] = 10b

0

mV

 

 

Vdd Value for LVD Trip

2.86

2.92

2.98[4]

 

 

VLVD0

VM[2:0] = 000b

V

 

VLVD1

VM[2:0] = 001b

2.96

3.02

3.08

V

 

VLVD2

VM[2:0] = 010b

3.07

3.13

3.20

V

 

VLVD3

VM[2:0] = 011b

3.92

4.00

4.08

V

 

VLVD4

VM[2:0] = 100b

4.39

4.48

4.57

V

 

VLVD5

VM[2:0] = 101b

4.55

4.64

4.74[5]

V

 

VLVD6

VM[2:0] = 110b

4.63

4.73

4.82

V

 

VLVD7

VM[2:0] = 111b

4.72

4.81

4.91

V

 

Notes

4.Always greater than 50 mV above PPOR (PORLEV = 00) for falling supply

5.Always greater than 50 mV above PPOR (PORLEV = 10) for falling supply

Document 38-08036 Rev. *C

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Contents San Jose, CA Document 38-08036 Rev. *C Revised December 08 FeaturesBlock Diagram Cypress Semiconductor Corporation 198 Champion CourtDigital System ApplicationsEnCoRe III Functional Overview EnCoRe III CoreAdditional System Resources EnCoRe III Device CharacteristicsEnCoRe III Device Characteristics Getting StartedDevice Editor Development ToolsDevelopment Kits PSoC Designer Software SubsystemsHardware Tools Designing with User ModulesGenerate Application DeviceEditorApplicationEditor DebuggerNumeric Naming Document ConventionsAcronyms Used Units of MeasurePin Part Pinout MLF CY7C64215 56-Pin enCoRe III Device Pin Part PinoutP05 Analog column mux input and column Output Pin Part Pinout SsopCY7C64215 28-Pin enCoRe III Device P07 Analog column mux inputRegister Mapping Tables Register ReferenceRegister Conventions Description Register Map Bank 0 Table User Space Name Addr 0,Hex AccessName Addr Access Hex Register Map Bank 1 Table Configuration SpaceUnits of Measure Symbol Unit of Measure Electrical SpecificationsAbsolute Maximum Ratings Operating TemperatureAbsolute Maximum Ratings Parameter Description Min Typ Unit DC Chip-Level Specifications DC Electrical CharacteristicsDC General Purpose IO Specifications DC Analog Output Buffer Specifications DC Full-Speed USB SpecificationsSupply Voltage Rejection Ratio DC Analog Reference SpecificationsP24 P24 P26 P24 P26 + DC Analog enCoRe III Block SpecificationsResistor Unit Value Continuous Time 12.2 RefHi = P24 + P26 P24 = Vdd/2, P26 = P24 + P26 +DC POR and LVD Specifications DC Programming Specifications AC Chip-Level Specifications AC Electrical CharacteristicsAC Full-Speed USB Specifications AC General Purpose IO SpecificationsAC External Clock Specifications AC Digital Block SpecificationsKHz Power = Low Power = High AC Analog Output Buffer SpecificationsMHz Power = Low Power = High Large Signal Bandwidth, 1Vpp, 3-dB BW, 100 pF LoadAC I2C Specifications AC Programming SpecificationsSDA Packaging Information Package DiagramsThermal Impedance Solder Reflow Peak TemperatureThermal Impedance for the Package Typical θ JA Ordering Code Flash Size Sram Bytes Package HandlingOrdering Information Parameter Description Min Typical Max UnitWorldwide Sales and Design Support Products PSoC Solutions Sales, Solutions, and Legal Information