Cypress CY7C64215 manual Packaging Information, Package Diagrams

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CY7C64215

Packaging Information

This section illustrates the package specification for the CY7C64215 enCoRe III, along with the thermal impedance for the package.

Important Note Emulation tools may require a larger area on the target PCB than the chip’s footprint. For a detailed description of the emulation tools’ dimensions, refer to the document titled PSoC Emulator Pod Dimensions at http://www.cypress.com/design/MR10161.

Package Diagrams

Figure 9. 56-Pin (8x8 mm) QFN

001-12921**

Document 38-08036 Rev. *C

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Contents San Jose, CA Document 38-08036 Rev. *C Revised December 08 FeaturesBlock Diagram Cypress Semiconductor Corporation 198 Champion CourtDigital System ApplicationsEnCoRe III Functional Overview EnCoRe III CoreAdditional System Resources EnCoRe III Device CharacteristicsEnCoRe III Device Characteristics Getting StartedDevice Editor Development ToolsDevelopment Kits PSoC Designer Software SubsystemsHardware Tools Designing with User ModulesGenerate Application DeviceEditorApplicationEditor DebuggerNumeric Naming Document ConventionsAcronyms Used Units of MeasurePin Part Pinout MLF CY7C64215 56-Pin enCoRe III Device Pin Part PinoutP05 Analog column mux input and column Output Pin Part Pinout SsopCY7C64215 28-Pin enCoRe III Device P07 Analog column mux inputRegister Reference Register Mapping TablesRegister Conventions Description Register Map Bank 0 Table User Space Name Addr 0,Hex AccessName Addr Access Hex Register Map Bank 1 Table Configuration SpaceUnits of Measure Symbol Unit of Measure Electrical SpecificationsOperating Temperature Absolute Maximum RatingsAbsolute Maximum Ratings Parameter Description Min Typ Unit DC Electrical Characteristics DC Chip-Level SpecificationsDC General Purpose IO Specifications DC Analog Output Buffer Specifications DC Full-Speed USB SpecificationsDC Analog Reference Specifications Supply Voltage Rejection RatioP24 P24 P26 P24 P26 + DC Analog enCoRe III Block SpecificationsResistor Unit Value Continuous Time 12.2 RefHi = P24 + P26 P24 = Vdd/2, P26 = P24 + P26 +DC POR and LVD Specifications DC Programming Specifications AC Chip-Level Specifications AC Electrical CharacteristicsAC Full-Speed USB Specifications AC General Purpose IO SpecificationsAC External Clock Specifications AC Digital Block SpecificationsKHz Power = Low Power = High AC Analog Output Buffer SpecificationsMHz Power = Low Power = High Large Signal Bandwidth, 1Vpp, 3-dB BW, 100 pF LoadAC I2C Specifications AC Programming SpecificationsSDA Packaging Information Package DiagramsSolder Reflow Peak Temperature Thermal ImpedanceThermal Impedance for the Package Typical θ JA Ordering Code Flash Size Sram Bytes Package HandlingOrdering Information Parameter Description Min Typical Max UnitWorldwide Sales and Design Support Products PSoC Solutions Sales, Solutions, and Legal Information