Cypress Pin Part Pinout Ssop, CY7C64215 28-Pin enCoRe III Device, P07 Analog column mux input

Page 9

CY7C64215

28-Pin Part Pinout

The CY7C64215 enCoRe III device is available in a 28-pin package which is listed and illustrated in the following table. Every port pin (labeled with a “P”) is capable of Digital IO. However, Vss and Vdd are not capable of Digital IO.

Table 3. 28-Pin Part Pinout (SSOP)

Pin

Type

 

 

No.

Digital

Analog

Name

Description

1

Power

GND

Ground connection

CY7C64215 28-Pin enCoRe III Device

2

IO

 

I, M

P0[7]

Analog column mux input.

3

IO

 

IO,M

P0[5]

Analog column mux input and column

 

 

 

 

 

output

4

IO

 

IO,M

P0[3]

Analog column mux input and column

 

 

 

 

 

output.

5

IO

 

I,M

P0[1]

Analog column mux input.

6

IO

 

M

P2[5]

 

7

IO

 

M

P2[3]

Direct switched capacitor block input.

8

IO

 

M

P2[1]

Direct switched capacitor block input.

9

IO

 

M

P1[7]

I2C Serial Clock (SCL).

10

IO

 

M

P1[5]

I2C Serial Data (SDA).

11

IO

 

M

P1[3]

 

12

IO

 

M

P1[1]

I2C Serial Clock (SCL), ISSP-SCLK.

13

Power

GND

Ground connection

14

 

USB

D+

 

15

 

USB

D-

 

16

Power

Vdd

Supply voltage.

17

IO

 

M

P1[0]

I2C Serial Data (SDA), ISSP-SDATA.

18

IO

 

M

P1[2]

 

19

IO

 

M

P1[4]

 

20

IO

 

M

P1[6]

 

21

IO

 

M

P2[0]

Direct switched capacitor block input.

22

IO

 

M

P2[2]

Direct switched capacitor block input.

23

IO

 

M

P2[4]

External Analog Ground (AGND) input.

24

IO

 

M

P0[0]

Analog column mux input.

25

IO

 

M

P0[2]

Analog column mux input and column

 

 

 

 

 

output.

26

IO

 

M

P0[4]

Analog column mux input and column

 

 

 

 

 

output.

27

IO

 

M

P0[6]

Analog column mux input.

28

Power

Vdd

Supply voltage.

LEGEND A = Analog, I = Input, O = Output, and M = Analog Mux Input.

* The MLF package has a center pad that must be connected to ground (Vss).

Vss

 

1

 

28

 

 

 

AI,P0[7]

 

2

 

27

 

 

 

AIO,P0[5]

 

 

3

 

26

 

 

 

AIO,P0[3]

 

 

4

 

25

 

 

 

AI,P0[1]

 

5

 

24

 

 

 

P2[5]

 

6

 

23

 

 

 

AI,P2[3]

 

 

7

SSOP

22

 

 

 

 

AI,P2[1]

 

8

 

21

 

 

 

I2CSCL,P1[7]

 

9

 

20

 

 

 

I2CSDA,P1[5]

 

10

 

19

 

 

 

P1[3]

 

11

 

18

 

 

 

I2CSCL, P1[1]

 

12

 

17

 

 

 

Vss

 

13

 

16

 

 

 

D+

 

14

 

15

 

 

 

 

 

 

 

 

 

Vdd

P0[6],AI

P0[4],AI

P0[2],AI

P0[0],AI

P2[4]

P2[2],AI

P2[0],AI

P1[6]

P1[4]

P1[2]

P1[0],I2C SDA

Vdd

D-

Document 38-08036 Rev. *C

Page 9 of 30

[+] Feedback

Image 9
Contents Block Diagram FeaturesCypress Semiconductor Corporation 198 Champion Court San Jose, CA Document 38-08036 Rev. *C Revised December 08EnCoRe III Functional Overview ApplicationsEnCoRe III Core Digital SystemEnCoRe III Device Characteristics EnCoRe III Device CharacteristicsGetting Started Additional System ResourcesDevelopment Kits Development ToolsPSoC Designer Software Subsystems Device EditorHardware Tools Designing with User ModulesApplicationEditor DeviceEditorDebugger Generate ApplicationAcronyms Used Document ConventionsUnits of Measure Numeric NamingPin Part Pinout MLF CY7C64215 56-Pin enCoRe III Device Pin Part PinoutCY7C64215 28-Pin enCoRe III Device Pin Part Pinout SsopP07 Analog column mux input P05 Analog column mux input and column OutputRegister Reference Register Mapping TablesRegister Conventions Description Register Map Bank 0 Table User Space Name Addr 0,Hex AccessName Addr Access Hex Register Map Bank 1 Table Configuration SpaceUnits of Measure Symbol Unit of Measure Electrical SpecificationsOperating Temperature Absolute Maximum RatingsAbsolute Maximum Ratings Parameter Description Min Typ Unit DC Electrical Characteristics DC Chip-Level SpecificationsDC General Purpose IO Specifications DC Analog Output Buffer Specifications DC Full-Speed USB SpecificationsDC Analog Reference Specifications Supply Voltage Rejection RatioP24 Resistor Unit Value Continuous Time 12.2 DC Analog enCoRe III Block SpecificationsRefHi = P24 + P26 P24 = Vdd/2, P26 = P24 + P26 + P24 P26 P24 P26 +DC POR and LVD Specifications DC Programming Specifications AC Chip-Level Specifications AC Electrical CharacteristicsAC Full-Speed USB Specifications AC General Purpose IO SpecificationsAC External Clock Specifications AC Digital Block SpecificationsMHz Power = Low Power = High AC Analog Output Buffer SpecificationsLarge Signal Bandwidth, 1Vpp, 3-dB BW, 100 pF Load KHz Power = Low Power = HighAC I2C Specifications AC Programming SpecificationsSDA Packaging Information Package DiagramsSolder Reflow Peak Temperature Thermal ImpedanceThermal Impedance for the Package Typical θ JA Ordering Information Package HandlingParameter Description Min Typical Max Unit Ordering Code Flash Size Sram BytesWorldwide Sales and Design Support Products PSoC Solutions Sales, Solutions, and Legal Information