CYV15G0404RB
CYV15G0404RB AC Electrical Characteristics (continued)
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CYV15G0404RB Device | RESET | Characteristics Over the Operating Range |
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tRST | Device RESET Pulse Width |
| 30 |
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CYV15G0404RB Reclocker Serial Output Characteristics Over the Operating Range |
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| Description | Condition | Min. | Max. | Unit |
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tB | Bit Time |
| 5128 | 660 | ps | ||
tRISE[14] | CML Output Rise Time 20−80% (CML Test Load) | SPDSELx = HIGH | 50 | 270 | ps | ||
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| SPDSELx = MID | 100 | 500 | ps |
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| SPDSELx =LOW | 180 | 1000 | ps |
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tFALL[14] | CML Output Fall Time 80−20% (CML Test Load) | SPDSELx = HIGH | 50 | 270 | ps | ||
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| SPDSELx = MID | 100 | 500 | ps |
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| SPDSELx =LOW | 180 | 1000 | ps |
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PLL Characteristics
Parameter | Description | Condition | Min | Typ | Max | Unit |
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CYV15G0404RB Reclocker Output PLL Characteristics |
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tJRGENSD[14, 22] | Reclocker Jitter Generation - SD Data Rate | TRGCLKx = 27 MHz |
| 133 |
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tJRGENHD[14, 22] | Reclocker Jitter Generation - HD Data Rate | TRGCLKx = 148.5 MHz |
| 107 |
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CYV15G0404RB Receive PLL Characteristics Over the Operating Range |
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tRXLOCK | Receive PLL Lock to Input Data Stream (cold start) |
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| 376k | UI |
| Receive PLL Lock to Input Data Stream |
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| 376k | UI |
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tRXUNLOCK | Receive PLL Unlock Rate |
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| 46 | UI |
Capacitance[14]
Parameter | Description | Test Conditions | Max | Unit |
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CINTTL | TTL Input Capacitance | TA = 25°C, f0 = 1 MHz, VCC = 3.3V | 7 | pF |
CINPECL | PECL input Capacitance | TA = 25°C, f0 = 1 MHz, VCC = 3.3V | 4 | pF |
Note
22.Receiver input stream is BIST data from the transmit channel. This data is reclocked and output to a wide bandwidth digital sampling oscilloscope. The measurement was recorded after 10,000 histogram hits, time referenced to REFCLKx± of the transmit channel.
Document #: | Page 22 of 27 |
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