CY7C1161V18, CY7C1176V18
CY7C1163V18, CY7C1165V18
TAP AC Switching Characteristics
The Tap AC Switching Characteristics over the operating range follows.[16, 17]
Parameter | Description | Min | Max | Unit |
tTCYC | TCK Clock Cycle Time | 50 |
| ns |
tTF | TCK Clock Frequency |
| 20 | MHz |
tTH | TCK Clock HIGH | 20 |
| ns |
tTL | TCK Clock LOW | 20 |
| ns |
Setup Times |
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tTMSS | TMS Setup to TCK Clock Rise | 5 |
| ns |
tTDIS | TDI Setup to TCK Clock Rise | 5 |
| ns |
tCS | Capture Setup to TCK Rise | 5 |
| ns |
Hold Times |
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tTMSH | TMS Hold after TCK Clock Rise | 5 |
| ns |
tTDIH | TDI Hold after Clock Rise | 5 |
| ns |
tCH | Capture Hold after Clock Rise | 5 |
| ns |
Output Times |
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tTDOV | TCK Clock LOW to TDO Valid |
| 10 | ns |
tTDOX | TCK Clock LOW to TDO Invalid | 0 |
| ns |
TAP Timing and Test Conditions
The Tap Timing and Test Conditions for the CY7C1161V18, CY7C1176V18, CY7C1163V18, and CY7C1165V18 follows.[17]
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TDO |
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Z0 | = 50Ω |
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(a) GND
Test Clock
TCK
tTMSS
0V
tTH
ALL INPUT PULSES
1.8V
0.9V
tTL
tTMSH tTCYC
Test Mode Select
TMS
Test Data In
TDI
Test Data Out
TDO
tTDIS | tTDIH |
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tTDOV |
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Notes
16.tCS and tCH refer to the setup and hold time requirements of latching data from the boundary scan register.
17.Test conditions are specified using the load in TAP AC test conditions. tR/tF = 1 ns.
Document Number: | Page 17 of 29 |
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