Cypress CY7C1475BV25, CY7C1471BV25, CY7C1473BV25 manual Scan Register Sizes Register Name Bit Size

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CY7C1471BV25

CY7C1473BV25, CY7C1475BV25

Table 8. Identification Register Definitions

Instruction Field

CY7C1471BV25

CY7C1473BV25

CY7C1475BV25

Description

(2MX36)

(4MX18)

(1MX72)

 

 

Revision Number (31:29)

000

000

000

Describes the version number

 

 

 

 

 

Device Depth (28:24)

01011

01011

01011

Reserved for internal use

 

 

 

 

 

Architecture/Memory Type(23:18)

001001

001001

001001

Defines memory type and architecture

 

 

 

 

 

Bus Width/Density(17:12)

100100

010100

110100

Defines width and density

 

 

 

 

 

Cypress JEDEC ID Code (11:1)

00000110100

00000110100

00000110100

Allows unique identification of SRAM

 

 

 

 

vendor

ID Register Presence Indicator (0)

1

1

1

Indicates the presence of an ID register

 

 

 

 

 

Table 9. Scan Register Sizes

Register Name

 

 

Bit Size (x36)

Bit Size (x18)

 

Bit Size (x72)

Instruction

 

3

3

 

3

 

 

 

 

 

 

 

 

Bypass

 

1

1

 

1

 

 

 

 

 

 

 

 

ID

 

32

32

 

32

 

 

 

 

 

 

 

 

Boundary Scan Order – 165FBGA

 

71

52

 

-

 

 

 

 

 

 

 

 

Boundary Scan Order – 209BGA

 

-

-

 

110

 

 

 

 

 

 

 

 

Table 10. Identification Codes

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Instruction

 

Code

 

 

Description

 

EXTEST

 

000

 

Captures IO ring contents. Places the boundary scan register between TDI and TDO.

 

 

 

 

Forces all SRAM outputs to High-Z state. This instruction is not 1149.1 compliant.

IDCODE

 

001

 

Loads the ID register with the vendor ID code and places the register between TDI

 

 

 

 

and TDO. This operation does not affect SRAM operations.

 

SAMPLE Z

 

010

 

Captures IO ring contents. Places the boundary scan register between TDI and TDO.

 

 

 

 

Forces all SRAM output drivers to a High-Z state.

 

RESERVED

 

011

 

Do Not Use: This instruction is reserved for future use.

 

 

 

 

 

 

SAMPLE/PRELOAD

 

100

 

Captures IO ring contents. Places the boundary scan register between TDI and TDO.

 

 

 

 

Does not affect SRAM operation. This instruction does not implement 1149.1 preload

 

 

 

 

function and is therefore not 1149.1 compliant.

 

RESERVED

 

101

 

Do Not Use: This instruction is reserved for future use.

 

 

 

 

 

 

 

RESERVED

 

110

 

Do Not Use: This instruction is reserved for future use.

 

 

 

 

 

 

BYPASS

 

111

 

Places the bypass register between TDI and TDO. This operation does not affect

 

 

 

 

SRAM operation.

 

 

 

Document #: 001-15013 Rev. *E

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Contents Selection Guide Functional Description FeaturesDescription 133 MHz 100 MHz Unit Cypress Semiconductor Corporation 198 Champion CourtLogic Block Diagram CY7C1473BV25 4M x Logic Block Diagram CY7C1471BV25 2M xLogic Block Diagram CY7C1475BV25 1M x CY7C1471BV25 Pin ConfigurationsCY7C1473BV25 CY7C1473BV25 4M x Ball Fbga 15 x 17 x 1.4 mm Pinout CY7C1471BV25 2M xNC/1G Ball Fbga 14 x 22 x 1.76 mm Pinout CY7C1475BV25 1M ×Power Supply Inputs to the Core of the Device Mode Input. Selects the Burst Order of the DevicePower Supply for the IO Circuitry Pin Definitions Name DescriptionPin Definitions Functional OverviewName Description TDIParameter Description Test Conditions Min Max Unit ZZ Mode Electrical CharacteristicsFirst Second Third Fourth Address A1 A0 Used Truth TableOperation Address Function Truth Table for Read/WriteIeee 1149.1 Serial Boundary Scan Jtag TAP Controller State DiagramTAP Registers TAP Timing 5V TAP AC Test Conditions TAP AC Switching CharacteristicsTAP DC Electrical Characteristics And Operating Conditions Identification Codes Instruction Description Scan Register Sizes Register Name Bit SizeBit # Ball ID Boundary Scan Exit Order 2M x Bit # Ball IDBoundary Scan Exit Order 4M x Bit # Ball ID Boundary Scan Exit Order 1M x Bit # Ball ID Maximum Ratings Electrical CharacteristicsOperating Range Range AmbientParameter Description Test Conditions Tqfp Fbga Unit CapacitanceThermal Resistance Setup Times Switching CharacteristicsParameter Description 133 MHz 100 MHz Unit Min Max Output TimesRead RiteStall Switching WaveformsAddress ZZ Mode Timing Ordering Information Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm Package DiagramsBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm Document History Issue Orig. Description of Change Date

CY7C1475BV25, CY7C1473BV25, CY7C1471BV25 specifications

Cypress Semiconductor, a leader in specialized memory solutions, offers a range of high-performance SRAM products, including the CY7C1471BV25, CY7C1473BV25, and CY7C1475BV25. These devices are designed to provide high-speed data processing capabilities along with impressive power efficiency, making them ideal choices for a variety of applications in telecommunications, networking, automotive, and consumer electronics.

The CY7C1471BV25 features a 1-Mbit density, while the CY7C1473BV25 and CY7C1475BV25 support densities of 3-Mbits and 5-Mbits respectively. All three models utilize a 3.3V power supply, and deliver fast access times of 5 ns (for CY7C1471BV25) and 6 ns (for CY7C1473BV25 and CY7C1475BV25). This rapid access enables quicker data retrieval and overall enhanced system performance.

One of the standout features of these SRAM devices is their asynchronous operation, which allows for straightforward integration into existing systems without the need for complex timing protocols. They can be easily interfaced with various microcontrollers and digital signal processors, providing flexibility and ease of use. Additionally, the devices are available in multiple package options, including the widely used TSOP and BGA formats, enabling designers to choose the best fit for their specific layouts.

In terms of technology, these SRAMs leverage advanced CMOS manufacturing processes, which contribute to their low power consumption and high reliability. With sleep modes and low standby current, they are particularly suited for battery-operated devices that demand energy efficiency.

Cypress products are renowned for their reliability and robustness, ensuring that the CY7C1471BV25, CY7C1473BV25, and CY7C1475BV25 can withstand the demands of harsh environments and extended usage. The devices also incorporate features such as high-speed data ports, which facilitate bidirectional data flow, making them optimal for both read and write operations.

In summary, the CY7C1471BV25, CY7C1473BV25, and CY7C1475BV25 SRAMs by Cypress are excellent choices for those seeking high-performance, low-power memory solutions. Their advanced technology, combined with a variety of features and options, caters to the needs of many industries, paving the way for innovative designs in modern electronics.
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