Cypress CY7C1475BV25, CY7C1471BV25, CY7C1473BV25 manual Truth Table, Operation Address, Used

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CY7C1471BV25

CY7C1473BV25, CY7C1475BV25

Table 4. Truth Table

The truth table for CY7C1471BV25, CY7C1473BV25, and CY7C1475BV25 follows.[1, 2, 3, 4, 5, 6, 7]

Operation

Address

CE

ZZ

CE

1

2

CE3

ADV/LD

WE

BW

X

OE

CEN

CLK

DQ

Used

Deselect Cycle

None

H

X

X

L

L

X

X

X

L

L->H

Tri-State

Deselect Cycle

None

X

X

H

L

L

X

X

X

L

L->H

Tri-State

Deselect Cycle

None

X

L

X

L

L

X

X

X

L

L->H

Tri-State

Continue Deselect Cycle

None

X

X

X

L

H

X

X

X

L

L->H

Tri-State

Read Cycle

External

L

H

L

L

L

H

X

L

L

L->H

Data Out (Q)

(Begin Burst)

Read Cycle

Next

X

X

X

L

H

X

X

L

L

L->H

Data Out (Q)

(Continue Burst)

NOP/Dummy Read

External

L

H

L

L

L

H

X

H

L

L->H

Tri-State

(Begin Burst)

Dummy Read

Next

X

X

X

L

H

X

X

H

L

L->H

Tri-State

(Continue Burst)

Write Cycle

External

L

H

L

L

L

L

L

X

L

L->H

Data In (D)

(Begin Burst)

Write Cycle

Next

X

X

X

L

H

X

L

X

L

L->H

Data In (D)

(Continue Burst)

NOP/Write Abort

None

L

H

L

L

L

L

H

X

L

L->H

Tri-State

(Begin Burst)

Write Abort

Next

X

X

X

L

H

X

H

X

L

L->H

Tri-State

(Continue Burst)

Ignore Clock Edge (Stall)

Current

X

X

X

L

X

X

X

X

H

L->H

-

Sleep Mode

None

X

X

X

H

X

X

X

X

X

X

Tri-State

Notes

1.X = “Don't Care.” H = Logic HIGH, L = Logic LOW. BWX = L signifies at least one Byte Write Select is active, BWX = Valid signifies that the desired Byte Write Selects are asserted, see “Truth Table for Read/Write” on page 12 for details.

2.Write is defined by BWX, and WE. See “Truth Table for Read/Write” on page 12.

3.When a write cycle is detected, all IOs are tri-stated, even during byte writes.

4.The DQs and DQPX pins are controlled by the current cycle and the OE signal. OE is asynchronous and is not sampled with the clock.

5.CEN = H, inserts wait states.

6.Device powers up deselected with the IOs in a tri-state condition, regardless of OE.

7.OE is asynchronous and is not sampled with the clock rise. It is masked internally during write cycles. During a read cycle DQs and DQPX = tri-state when OE is inactive or when the device is deselected, and DQs and DQPX = data when OE is active.

Document #: 001-15013 Rev. *E

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesSelection Guide Functional Description Description 133 MHz 100 MHz UnitLogic Block Diagram CY7C1473BV25 4M x Logic Block Diagram CY7C1471BV25 2M xLogic Block Diagram CY7C1475BV25 1M x CY7C1471BV25 Pin ConfigurationsCY7C1473BV25 CY7C1473BV25 4M x Ball Fbga 15 x 17 x 1.4 mm Pinout CY7C1471BV25 2M xNC/1G Ball Fbga 14 x 22 x 1.76 mm Pinout CY7C1475BV25 1M ×Pin Definitions Name Description Mode Input. Selects the Burst Order of the DevicePower Supply Inputs to the Core of the Device Power Supply for the IO CircuitryTDI Functional OverviewPin Definitions Name DescriptionParameter Description Test Conditions Min Max Unit ZZ Mode Electrical CharacteristicsFirst Second Third Fourth Address A1 A0 Used Truth TableOperation Address Function Truth Table for Read/WriteIeee 1149.1 Serial Boundary Scan Jtag TAP Controller State DiagramTAP Registers TAP Timing 5V TAP AC Test Conditions TAP AC Switching CharacteristicsTAP DC Electrical Characteristics And Operating Conditions Identification Codes Instruction Description Scan Register Sizes Register Name Bit SizeBit # Ball ID Boundary Scan Exit Order 2M x Bit # Ball IDBoundary Scan Exit Order 4M x Bit # Ball ID Boundary Scan Exit Order 1M x Bit # Ball ID Range Ambient Electrical CharacteristicsMaximum Ratings Operating RangeParameter Description Test Conditions Tqfp Fbga Unit CapacitanceThermal Resistance Output Times Switching CharacteristicsSetup Times Parameter Description 133 MHz 100 MHz Unit Min MaxRead RiteStall Switching WaveformsAddress ZZ Mode Timing Ordering Information Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm Package DiagramsBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm Document History Issue Orig. Description of Change Date

CY7C1475BV25, CY7C1473BV25, CY7C1471BV25 specifications

Cypress Semiconductor, a leader in specialized memory solutions, offers a range of high-performance SRAM products, including the CY7C1471BV25, CY7C1473BV25, and CY7C1475BV25. These devices are designed to provide high-speed data processing capabilities along with impressive power efficiency, making them ideal choices for a variety of applications in telecommunications, networking, automotive, and consumer electronics.

The CY7C1471BV25 features a 1-Mbit density, while the CY7C1473BV25 and CY7C1475BV25 support densities of 3-Mbits and 5-Mbits respectively. All three models utilize a 3.3V power supply, and deliver fast access times of 5 ns (for CY7C1471BV25) and 6 ns (for CY7C1473BV25 and CY7C1475BV25). This rapid access enables quicker data retrieval and overall enhanced system performance.

One of the standout features of these SRAM devices is their asynchronous operation, which allows for straightforward integration into existing systems without the need for complex timing protocols. They can be easily interfaced with various microcontrollers and digital signal processors, providing flexibility and ease of use. Additionally, the devices are available in multiple package options, including the widely used TSOP and BGA formats, enabling designers to choose the best fit for their specific layouts.

In terms of technology, these SRAMs leverage advanced CMOS manufacturing processes, which contribute to their low power consumption and high reliability. With sleep modes and low standby current, they are particularly suited for battery-operated devices that demand energy efficiency.

Cypress products are renowned for their reliability and robustness, ensuring that the CY7C1471BV25, CY7C1473BV25, and CY7C1475BV25 can withstand the demands of harsh environments and extended usage. The devices also incorporate features such as high-speed data ports, which facilitate bidirectional data flow, making them optimal for both read and write operations.

In summary, the CY7C1471BV25, CY7C1473BV25, and CY7C1475BV25 SRAMs by Cypress are excellent choices for those seeking high-performance, low-power memory solutions. Their advanced technology, combined with a variety of features and options, caters to the needs of many industries, paving the way for innovative designs in modern electronics.