Cypress CY7C1475V33, CY7C1473V33 manual Identification Register Definitions, Scan Register Sizes

				CY7C1471V33
				CY7C1473V33
				CY7C1475V33
Identification Register Definitions
Instruction Field	CY7C1471V33	CY7C1473V33	CY7C1475V33	Description
	(2Mx36)	(4Mx18)	(1Mx72)
Revision Number (31:29)	000	000	000	Describes the version number
Device Depth (28:24)[13]	01011	01011	01011	Reserved for internal use
Architecture/Memory	001001	001001	001001	Defines memory type and architecture
Type(23:18)
Bus Width/Density(17:12)	100100	010100	110100	Defines width and density
Cypress JEDEC ID Code (11:1)	00000110100	00000110100	00000110100	Enables unique identification of SRAM
				vendor
ID Register Presence Indicator (0)	1	1	1	Indicates the presence of an ID
				register

Scan Register Sizes

Register Name	Bit Size (x36)	Bit Size (x18)	Bit Size (x72)
Instruction	3	3	3
Bypass	1	1	1
ID	32	32	32
Boundary Scan Order – 165FBGA	71	52	-
Boundary Scan Order – 209BGA	-	-	110

Identification Codes

Instruction	Code	Description
EXTEST	000	Captures IO ring contents. Places the boundary scan register between TDI and TDO.
		Forces all SRAM outputs to High-Z state. This instruction is not 1149.1-compliant.
IDCODE	001	Loads the ID register with the vendor ID code and places the register between TDI and
		TDO. This operation does not affect SRAM operations.
SAMPLE Z	010	Captures IO ring contents. Places the boundary scan register between TDI and TDO.
		Forces all SRAM output drivers to a High-Z state.
RESERVED	011	Do Not Use: This instruction is reserved for future use.
SAMPLE/PRELOAD	100	Captures IO ring contents. Places the boundary scan register between TDI and TDO.
		Does not affect SRAM operation. This instruction does not implement 1149.1 preload
		function and is therefore not 1149.1 compliant.
RESERVED	101	Do Not Use: This instruction is reserved for future use.
RESERVED	110	Do Not Use: This instruction is reserved for future use.
BYPASS	111	Places the bypass register between TDI and TDO. This operation does not affect SRAM
		operations.

Note

13. Bit #24 is “1” in the ID Register Definitions for both 2.5V and 3.3V versions of this device.

Document #: 38-05288 Rev. *J Page 18 of 32

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