Cypress CY7C1414JV18, CY7C1410JV18, CY7C1412JV18 manual Switching Waveforms, Write Read, Write NOP

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CY7C1410JV18, CY7C1425JV18

CY7C1412JV18, CY7C1414JV18

Switching Waveforms

Figure 3. Read/Write/Deselect Sequence [25, 26, 27]

READ	WRITE	READ	WRITE	READ	WRITE	NOP
1	2	3	4	5	6	7

WRITE NOP

tKH

RPS

WPS

AA0 tSA

tKL

tCYC

tKHKH

tSC	tHC
A2	A3
tSA tHA

D D10	D11		D30
			tSD
Q
			tCLZ
	tKHCH	tKL	tCO

D50

Q00

D51

tSD tHD

Q01 Q20

tDOH tCQDOH

D61

Q21 Q40

tCQD

Q41

tCHZ

CtKH

tKHCH	tKHKH	tCYC
tKHCH

tCCQO

tCQOH

tCCQO

tCQOH

tCQH

tCQHCQH

CARE

UNDEFINED

Notes

25.Q00 refers to output from address A0. Q01 refers to output from the next internal burst address following A0, that is, A0+1.

26.Outputs are disabled (High-Z) one clock cycle after a NOP.

27.In this example, if address A2 = A1, then data Q20 = D10 and Q21 = D11. Write data is forwarded immediately as read results. This note applies to the whole diagram.

Document #: 001-12561 Rev. *D

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Contents Selection Guide FeaturesConfigurations Functional DescriptionDoff Logic Block Diagram CY7C1410JV18Logic Block Diagram CY7C1425JV18 Logic Block Diagram CY7C1414JV18 Logic Block Diagram CY7C1412JV18CY7C1425JV18 4M x Pin ConfigurationBall Fbga 15 x 17 x 1.4 mm Pinout CY7C1410JV18 4M xCY7C1414JV18 1M x CY7C1412JV18 2M xWPS BWS Pin Name Pin Description Pin DefinitionsTDO for Jtag Power Supply Inputs to the Core of the DevicePower Supply Inputs for the Outputs of the Device Is Referenced with Respect toFunctional Overview Sram #1 Application ExampleProgrammable Impedance Echo ClocksBWS0 BWS1 Truth TableWrite Cycle Descriptions RPS WPSBWS0 BWS1 BWS2 BWS3 BWS0Ieee 1149.1 Serial Boundary Scan Jtag Idcode TAP Controller State Diagram TCK TAP Controller Block DiagramTAP Electrical Characteristics TDITAP Timing and Test Conditions TAP AC Switching CharacteristicsInstruction Codes Identification Register DefinitionsScan Register Sizes Bit # Bump ID Boundary Scan OrderDLL Constraints Power Up Sequence in QDR-II SramPower Up Waveforms Power Up SequenceMaximum Ratings Electrical CharacteristicsDC Electrical Characteristics AC Test Loads and Waveforms AC Electrical CharacteristicsCapacitance Thermal ResistanceDLL Timing Switching CharacteristicsCypress Consortium Description 267 MHz 250 MHz Unit Parameter Min MaxWrite NOP Switching WaveformsWrite Read Ordering Information Ball Fbga 15 x 17 x 1.40 mm Package DiagramVKN/AESA REV ECN no Issue ORIG. Description of Change DateDocument History VKN