Cypress CY7C1347G manual

Page 4

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CY7C1347G

Pinouts (continued)

Figure 2. 119-Ball BGA

1

2

3

4

5

6

7

A

VDDQ

A

A

A

A

VDDQ

ADSP

B

NC/288M

CE2

A

A

3

NC/576M

ADSC

CE

C

NC/144M

A

A

VDD

A

A

NC/1G

D

DQC

DQPC

VSS

NC

VSS

DQPB

DQB

E

DQC

DQC

VSS

1

VSS

DQB

DQB

CE

F

VDDQ

DQC

VSS

VSS

DQB

VDDQ

OE

G

DQC

DQC

DQB

DQB

BW

C

ADV

BW

B

H

DQC

DQC

VSS

VSS

DQB

DQB

GW

J

VDDQ

VDD

NC

VDD

NC

VDD

VDDQ

K

DQD

DQD

VSS

CLK

VSS

DQA

DQA

L

DQD

DQD

D

NC

A

DQA

DQA

BW

BW

M

VDDQ

DQD

VSS

VSS

DQA

VDDQ

BWE

N

DQD

DQD

VSS

A1

VSS

DQA

DQA

P

DQD

DQPD

VSS

A0

VSS

DQPA

DQA

R

NC

A

MODE

VDD

NC

A

NC

T

NC

NC/72M

A

A

A

NC/36M

ZZ

U

VDDQ

NC

NC

NC

NC

NC

VDDQ

Figure 3. 165-Ball FBGA

1

2

3

4

5

6

7

8

9

10

11

A

NC/288M

C

B

3

A

NC

A

CE1

BW

BW

CE

BWE

ADSC

ADV

B

NC/144M

A

CE2

D

A

CLK

A

NC/576M

BW

BW

GW

OE

ADSP

C

DQPC

NC

VDDQ

VSS

VSS

VSS

VSS

VSS

VDDQ

NC/1G

DQPB

D

DQC

DQC

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQB

DQB

E

DQC

DQC

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQB

DQB

F

DQC

DQC

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQB

DQB

G

DQC

DQC

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQB

DQB

H

NC

VSS

NC

VDD

VSS

VSS

VSS

VDD

NC

NC

ZZ

J

DQD

DQD

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQA

DQA

K

DQD

DQD

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQA

DQA

L

DQD

DQD

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQA

DQA

M

DQD

DQD

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQA

DQA

N

DQPD

NC

VDDQ

VSS

NC

NC/18M

VSS

VSS

VDDQ

NC

DQPA

P

NC

NC/72M

A

A

NC

A1

NC

A

A

A

NC/9M

R

MODE

NC/36M

A

A

NC

A0

NC

A

A

A

A

Document #: 38-05516 Rev. *F

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Contents Features CY7C1347GSelection Guide Functional Description1Block Diagram ADDRESSREGISTER ADSCPinouts CY7C1347GCY7C1347G CY7C1347G Table 1. Pin DefinitionsName DescriptionSingle Read Accesses Single Write Accesses Initiated by ADSPSingle Write Accesses Initiated by ADSC Functional Overview2. X = “Do Not Care.” H = Logic HIGH, L = Logic LOW Table 5. Truth Table 2, 3, 4, 5 Electrical Characteristics Maximum RatingsOperating Range VDDQElectrical Characteristics continued CapacitanceThermal Resistance AC Test Loads and WaveformsSwitching Characteristics Switching Waveforms Figure 5. Read Cycle Timing16Switching Waveforms continued Figure 6. Write Cycle Timing16Page 14 of Figure 7. Read/Write Cycle Timing16, 1819. GW is HIGH 21. DQs are in high-Z when exiting ZZ sleep mode ALL INPUTS except ZZOrdering Information Ordering Information continued Package Diagrams Figure 9. 100-Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mmPackage Diagrams continued Figure 10. 119-Ball BGA 14 x 22 x 2.4 mmFigure 11. 165-Ball FBGA 13 x 15 x 1.4 mm PACKAGE WEIGHT 0.475gPage 20 of Document History Page Document Title CY7C1347G 4-Mbit 128K x 36 Pipelined Sync SRAMDocument Number SubmissionSales, Solutions, and Legal Information PSoC SolutionsWorldwide Sales and Design Support Products