Diamond Power Products MM-48-AT Register Map Bit Assignments, Write operations, Read operations

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5.2 Register Map Bit Assignments

A blank location in the Write registers has no function.

A blank location in the Read registers has no function and reads back as 0.

WRITE operations

 

 

7

 

6

 

5

4

3

 

2

 

 

1

0

 

0

DA7

DA6

DA5

DA4

DA3

DA2

 

DA1

DA0

 

1

 

 

 

 

 

 

DA11

DA10

 

DA9

DA8

 

2

HIGH3

HIGH2

HIGH1

HIGH0

LOW3

LOW2

 

LOW1

LOW0

 

3

RELAY7

RELAY6

RELAY5

RELAY4

RELAY3

RELAY2

 

RELAY1

RELAY0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

 

 

 

 

 

 

DIR3

DIR2

 

DIR1

DIR0

 

5

 

 

 

 

 

 

DIO3

DIO2

 

DIO1

DIO0

 

6

OEN3

OEN2

OEN1

OEN0

POL3

POL2

 

POL1

POL0

 

7

 

 

 

 

 

 

DAUPDT

DACH2

 

DACH1

DACH0

 

8

 

 

 

 

 

DAPRE

DAPRLD

RESET

 

FIFORST

ADSTART

 

9

 

 

 

 

CKSEL1

CKFRQ1

CKFRQ0

SCNINT

 

CLKEN

CLKSEL

 

10

 

 

 

 

 

 

PAGE

FIFOTH

 

FIFOEN

SCANEN

 

11

CLRT

CLRD

CLRO

CLRA

TINTE

DINTE

 

OINTE

AINTE

 

12

Page 0: Counter data LSB

 

Page 1: Calibration Data

 

 

 

13

Page 0: Counter data CSB

 

Page 1: Calibration Address

 

 

14

Page 0: Counter data MSB

 

Page 1: Calibration Control

 

 

15

Page 0: Counter Control Register

Page 1: EEPROM Access Key Register

 

READ operations

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7

 

6

 

5

4

3

 

2

 

 

1

0

 

0

AD7

 

AD6

 

AD5

AD4

AD3

 

AD2

 

AD1

AD0

 

1

AD15

 

AD14

 

AD13

AD12

AD11

 

AD10

 

AD9

AD8

 

2

HIGH3

 

HIGH2

 

HIGH1

HIGH0

LOW3

 

LOW2

 

LOW1

LOW0

 

3

RELAY7

 

RELAY6

 

RELAY5

RELAY4

RELAY3

 

RELAY2

 

RELAY1

RELAY0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

 

 

 

 

 

 

DIR3

 

DIR2

 

DIR1

DIR0

 

5

DEDGE3

 

DEDGE2

 

DEDGE1

DEDGE0

DIO3

 

DIO2

 

DIO1

DIO0

 

6

OEN3

 

OEN2

 

OEN1

OEN0

POL3

 

POL2

 

POL1

POL0

 

7

OEDGE3

 

OEDGE2

 

OEDGE1

OEDGE0

OPTO3

 

OPTO2

 

OPTO1

OPTO0

 

8

 

 

 

 

 

POL

ADCH3

 

ADCH2

 

ADCH1

ADCH0

 

9

ADBUSY

 

DABUSY

 

CKSEL1

CKFRQ1

CKFRQ0

 

SCNINT

 

CLKEN

CLKSEL

 

10

OVF

 

HF

 

8F

EF

PAGE

 

FIFOTH

 

FIFOEN

SCANEN

 

11

TINT

 

DINT

 

OINT

AINT

TINTE

 

DINTE

 

OINTE

AINTE

 

 

 

 

 

 

 

 

 

 

 

 

12

Page 0: Counter data LSB

 

Page 1: Calibration Data

 

 

 

13

Page 0: Counter data CSB

 

Page 1: Calibration Address

 

 

14

Page 0: Counter data MSB

 

Page 1: Calibration Control/Status

 

 

 

 

 

 

 

 

 

15

Page 0: ---

 

 

Page 1: FPGA revision code

 

Diamond-MM-48-AT User Manual V1.01

Page 10

Image 10
Contents DIAMOND-MM-48-AT Table of Contents Description DIAMOND-MM-48-AT Board Drawing O Header Pinout and PIN Description Signal Name DefinitionJ3 Analog and Digital I/O J4 Relays and Optocouplers Signal Name Definition Relay output contactsOptoisolated input contacts Base Address Jumper Position Hex Decimal Board ConfigurationBase Address Interrupt Level SelectionReserved Optocoupler PolarityAnalog Input Range Base + Write Function Read Function OverviewLSB MSB DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 Register Map Bit AssignmentsWrite operations Read operationsDefinitions Register DefinitionsBase + Write Base + ReadBase + Read/Write A/D Channel Register AD9 AD8HIGH3 HIGH2 HIGH1 HIGH0 LOW3 LOW2 LOW1 LOW0 RELAY7 RELAY6 RELAY5 RELAY4 RELAY3 RELAY2 RELAY1 RELAY0 Base + Read/Write Digital I/O Configuration RegisterBase + Read/Write Relay Control Port DIR3 DIR2 DIR1 DIR0DEDGE3 DEDGE2 DEDGE1 DEDGE0 DIO3 DIO2 DIO1 DIO0 DIO3 DIO2 DIO1 DIO0Base + Read Digital I/O Data and Edge Status OEN3 OEN2 OEN1 OEN0 POL3 POL2 POL1 POL0Daupdt DACH2 DACH1 DACH0 Base + Write Channel and Control RegisterOEDGE3 OEDGE2 OEDGE1 OEDGE0 OPTO3 OPTO2 OPTO1 OPTO0 Base + Write Command Register Dapre Daprld Reset Fiforst AdstartBase + Read Status Register POL ADCH3 ADCH2 ADCH1 ADCH0Base + Write Configuration Register CKSEL1 CKFRQ1 CKFRQ0 Scnint Clken ClkselBase + Read Configuration & Status Register Adbusy Dabusy CKSEL1 CKFRQ1 CKFRQ0 Scnint Clken ClkselBase + Read Fifo Status Register Base + Write Fifo Control RegisterFifoth Fifoen Scanen OVF Fifoth Fifoen ScanenBase + Write Interrupt Control Register Clrt Clrd Clro Clra Tinte Dinte Ointe AinteBase + Read Interrupt Status Register Tint Dint Oint Aint Tinte Dinte Ointe AinteBase + Read/Write Counter/Timer D15 Base + Read/Write Counter/Timer D7Base + Read/Write Counter/Timer D23 Ctrno Latch Gtdis Gten Ctdis Cten Load CLR Base + Write Counter/Timer Control RegisterCtrno Base + Read/Write Eeprom / TrimDAC Data Register Base + Read/Write Eeprom / TrimDAC Address RegisterBase + Read Calibration Status Register Base + Write Eeprom Access Key RegisterBase + Write Calibration Control Register Base + Read Fpga Revision CodeInput Ranges Analog Input Ranges and ResolutionResolution Single Ended and Differential InputsPerforming AN A/D Conversion Trigger an A/D conversion on the current channel LSB = readbase MSB = readbase+1 Data = MSB * 256 + LSBInput voltage = A/D value / 32768 * Full-scale voltage Clken Clksel D SCAN, FIFO, and Interrupt OperationTrigger Conversion or ScanFifoen Fifoth Scanen Fifo OperationInterrupt Operation Fifoen =Operation Table Guidelines for Selecting Fifo Use Fifoen and FifothAinte Fifoen Scanen Analog Output Overview Generating AN Analog Output 12.2 A/D calibration Autocalibration OperationReference Voltages 12.3 D/A CalibrationDigital I/O Operation Procedure for enabling interrupts on selected edges Optocoupler OperationEdge detection assumes OENn = 1 to enable edge detection Polarity and logic readbackRelay Operation Counter 0 A/D Sample Control COUNTER/TIMER OperationCounter 1 Counting/Totalizing Functions Command Sequences CounterCounter Outpbase+15,0x01 Outpbase+15,0x81 Autocalibration SpecificationsGeneral