Diamond Power Products MM-48-AT user manual Base + Write Counter/Timer Control Register, Ctrno

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Base + 15

Write

 

Counter/Timer Control Register

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit No.

7

6

 

5

4

3

 

2

1

0

 

 

 

 

 

 

 

 

 

 

 

Name

CTRNO

LATCH

 

GTDIS

GTEN

CTDIS

 

CTEN

LOAD

CLR

 

 

 

 

 

 

 

 

 

 

 

This register is used to control the counter/timers. A counter is selected with bit 7, and then a 1 is written to any ONE of bits 6 – 0 to select the desired operation for that counter. The other bits and associated functions are not affected. Thus only one operation can be performed at a time.

CTRNO

Counter no., 0 or 1

LATCH

Latch the selected counter so that its value may be read. The counter must be

 

latched before it is read. Reading from registers 12-14 returns the most recently

 

latched value. If you are reading Counter 1 data, read only Base + 12 and Base

 

+ 13. Any data in Base + 14 will be from the previous Counter 0 access.

GTDIS

Disable external gating for the selected counter.

GTEN

Enable external gating for the selected counter. If enabled, the associated gate

 

signal GATE0 or GATE1 controls counting on the counter. If the GATEn signal is

 

high, counting is enabled. If the GATEn signal is low, counting is disabled.

CTDIS

Disable counting on the selected counter. The counter will ignore input pulses.

CTEN

Enable counting on the selected counter. The counter will decrement on each

 

input pulse.

LOAD

Load the selected counter with the data written to Base + 12 through Base + 14

 

or Base + 12 and Base + 13 (depending on which counter is being loaded).

CLR

Clear the current counter (set its value to 0).

To load a counter: First write the load value to Base + 12 and Base + 13 (for Counter 1) or Base + 12 through Base + 14 (for Counter 0). Then write a Load command to Base + 15. For example, to load Counter 0 with the hex value 123456:

Write 0x12 to Base + 14 (these three bytes can be written to in any order)

Write 0x34 to Base + 13

Write 0x56 to Base + 12

Write 0x02 to Base + 15 to load counter 0

To enable counting: Write 0x04 (ctr 0) or 0x84 (ctr 1) to Base + 15.

To stop counting: Write 0x08 (ctr 0) or 0x88 (ctr 1) to Base + 15.

To read a counter: First latch it, then read the value:

Write 0x40 to Base + 15 to latch counter 0 or 0xC0 to latch counter 1

Read LSB from Base +12

Read Middle Byte from Base + 13

Read MSB from Base + 14

Assemble 3 bytes into the current counter value

Diamond-MM-48-AT User Manual V1.01

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Image 24
Contents DIAMOND-MM-48-AT Table of Contents Description DIAMOND-MM-48-AT Board Drawing Signal Name Definition O Header Pinout and PIN DescriptionJ3 Analog and Digital I/O Signal Name Definition Relay output contacts J4 Relays and OptocouplersOptoisolated input contacts Board Configuration Base AddressBase Address Jumper Position Hex Decimal Interrupt Level SelectionOptocoupler Polarity ReservedAnalog Input Range Overview Base + Write Function Read FunctionLSB MSB Register Map Bit Assignments Write operationsDA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 Read operationsRegister Definitions Base + WriteDefinitions Base + ReadAD9 AD8 Base + Read/Write A/D Channel RegisterHIGH3 HIGH2 HIGH1 HIGH0 LOW3 LOW2 LOW1 LOW0 Base + Read/Write Digital I/O Configuration Register Base + Read/Write Relay Control PortRELAY7 RELAY6 RELAY5 RELAY4 RELAY3 RELAY2 RELAY1 RELAY0 DIR3 DIR2 DIR1 DIR0DIO3 DIO2 DIO1 DIO0 Base + Read Digital I/O Data and Edge StatusDEDGE3 DEDGE2 DEDGE1 DEDGE0 DIO3 DIO2 DIO1 DIO0 OEN3 OEN2 OEN1 OEN0 POL3 POL2 POL1 POL0Base + Write Channel and Control Register Daupdt DACH2 DACH1 DACH0OEDGE3 OEDGE2 OEDGE1 OEDGE0 OPTO3 OPTO2 OPTO1 OPTO0 Base + Write Command Register Dapre Daprld Reset Fiforst AdstartBase + Read Status Register POL ADCH3 ADCH2 ADCH1 ADCH0Base + Write Configuration Register CKSEL1 CKFRQ1 CKFRQ0 Scnint Clken ClkselBase + Read Configuration & Status Register Adbusy Dabusy CKSEL1 CKFRQ1 CKFRQ0 Scnint Clken ClkselBase + Write Fifo Control Register Fifoth Fifoen ScanenBase + Read Fifo Status Register OVF Fifoth Fifoen ScanenBase + Write Interrupt Control Register Clrt Clrd Clro Clra Tinte Dinte Ointe AinteBase + Read Interrupt Status Register Tint Dint Oint Aint Tinte Dinte Ointe AinteBase + Read/Write Counter/Timer D7 Base + Read/Write Counter/Timer D15Base + Read/Write Counter/Timer D23 Base + Write Counter/Timer Control Register Ctrno Latch Gtdis Gten Ctdis Cten Load CLRCtrno Base + Read/Write Eeprom / TrimDAC Data Register Base + Read/Write Eeprom / TrimDAC Address RegisterBase + Write Eeprom Access Key Register Base + Write Calibration Control RegisterBase + Read Calibration Status Register Base + Read Fpga Revision CodeAnalog Input Ranges and Resolution ResolutionInput Ranges Single Ended and Differential InputsPerforming AN A/D Conversion Trigger an A/D conversion on the current channel LSB = readbase MSB = readbase+1 Data = MSB * 256 + LSBInput voltage = A/D value / 32768 * Full-scale voltage D SCAN, FIFO, and Interrupt Operation TriggerClken Clksel Conversion or ScanFifo Operation Interrupt OperationFifoen Fifoth Scanen Fifoen =Guidelines for Selecting Fifo Use Fifoen and Fifoth Operation TableAinte Fifoen Scanen Analog Output Overview Generating AN Analog Output Autocalibration Operation Reference Voltages12.2 A/D calibration 12.3 D/A CalibrationDigital I/O Operation Procedure for enabling interrupts on selected edges Optocoupler OperationEdge detection assumes OENn = 1 to enable edge detection Polarity and logic readbackRelay Operation COUNTER/TIMER Operation Counter 0 A/D Sample ControlCounter 1 Counting/Totalizing Functions Command Sequences CounterCounter Outpbase+15,0x01 Outpbase+15,0x81 Specifications AutocalibrationGeneral