Diamond Power Products MM-48-AT O Header Pinout and PIN Description, J3 Analog and Digital I/O

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3. I/O HEADER PINOUT AND PIN DESCRIPTION

Diamond-MM-48-AT provides two I/O headers. J3, located on the right side of the board, is a 40-pin header that includes the analog in, analog out, and logic-level digital I/O features. Pin 1 is the upper left pin and is marked on the board. J4, located on the left side of the baord, is a 34-pin header with the relay and optocoupler features.

J3: Analog and Digital I/O

Vin 0	1	2	Vin 1
Vin 2	3	4	Vin 3
Vin 4	5	6	Vin 5
Vin 6	7	8	Vin 7
Vin 8	9	10	Vin 9
Vin 10	11	12	Vin 11
Vin 12	13	14	Vin 13
Vin 14	15	16	Vin 15
A/D Gnd	17	18	A/D Gnd
Vout 0	19	20	Vout 1
Vout 2	21	22	Vout 3
Vout 4	23	24	Vout 5
Vout 6	25	26	Vout 7
D/A Gnd	27	28	Dgnd
Extclk	29	30	Gate 0
Out 0	31	32	Clk 1
Gate 1	33	34	Out 1
DIO 0	35	36	DIO 1
DIO 2	37	38	DIO 3
+5V	39	40	Dgnd

Signal Name	Definition
Vin 0-15	Analog input channels 0 to 15; all inputs are single-ended
Vout 0-7	Analog output channels 0 – 7
DIO 0-3	Digital I/O port, TTL / CMOS compatible; programmable direction
Extclk	External A/D trigger input
Gate 0	Counter 0 gate input
Out 0	Counter 0 output
Clk 1	Counter 1 clock input
Gate 1	Counter 1 gate input
Out 1	Counter 1 output
+5V	Connected to PC/104 bus power supply
A/D Gnd	Analog ground for analog inputs
D/A Gnd	Analog ground for analog outputs
Dgnd	Digital ground
	Note: all grounds are electrically connected. The different pins are
	intended to reduce noise by separating the current paths on the
	board.

Diamond-MM-48-AT User Manual V1.01

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Contents DIAMOND-MM-48-AT Table of Contents Description DIAMOND-MM-48-AT Board Drawing J3 Analog and Digital I/O Signal Name DefinitionO Header Pinout and PIN Description Optoisolated input contacts Signal Name Definition Relay output contactsJ4 Relays and Optocouplers Base Address Board ConfigurationBase Address Jumper Position Hex Decimal Interrupt Level SelectionAnalog Input Range Optocoupler PolarityReserved LSB MSB OverviewBase + Write Function Read Function Write operations Register Map Bit AssignmentsDA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 Read operationsBase + Write Register DefinitionsDefinitions Base + ReadHIGH3 HIGH2 HIGH1 HIGH0 LOW3 LOW2 LOW1 LOW0 AD9 AD8Base + Read/Write A/D Channel Register Base + Read/Write Relay Control Port Base + Read/Write Digital I/O Configuration RegisterRELAY7 RELAY6 RELAY5 RELAY4 RELAY3 RELAY2 RELAY1 RELAY0 DIR3 DIR2 DIR1 DIR0Base + Read Digital I/O Data and Edge Status DIO3 DIO2 DIO1 DIO0DEDGE3 DEDGE2 DEDGE1 DEDGE0 DIO3 DIO2 DIO1 DIO0 OEN3 OEN2 OEN1 OEN0 POL3 POL2 POL1 POL0OEDGE3 OEDGE2 OEDGE1 OEDGE0 OPTO3 OPTO2 OPTO1 OPTO0 Base + Write Channel and Control RegisterDaupdt DACH2 DACH1 DACH0 Dapre Daprld Reset Fiforst Adstart Base + Write Command RegisterPOL ADCH3 ADCH2 ADCH1 ADCH0 Base + Read Status RegisterCKSEL1 CKFRQ1 CKFRQ0 Scnint Clken Clksel Base + Write Configuration RegisterAdbusy Dabusy CKSEL1 CKFRQ1 CKFRQ0 Scnint Clken Clksel Base + Read Configuration & Status RegisterFifoth Fifoen Scanen Base + Write Fifo Control RegisterBase + Read Fifo Status Register OVF Fifoth Fifoen ScanenClrt Clrd Clro Clra Tinte Dinte Ointe Ainte Base + Write Interrupt Control RegisterTint Dint Oint Aint Tinte Dinte Ointe Ainte Base + Read Interrupt Status RegisterBase + Read/Write Counter/Timer D23 Base + Read/Write Counter/Timer D7Base + Read/Write Counter/Timer D15 Ctrno Base + Write Counter/Timer Control RegisterCtrno Latch Gtdis Gten Ctdis Cten Load CLR Base + Read/Write Eeprom / TrimDAC Address Register Base + Read/Write Eeprom / TrimDAC Data RegisterBase + Write Calibration Control Register Base + Write Eeprom Access Key RegisterBase + Read Calibration Status Register Base + Read Fpga Revision CodeResolution Analog Input Ranges and ResolutionInput Ranges Single Ended and Differential InputsPerforming AN A/D Conversion LSB = readbase MSB = readbase+1 Data = MSB * 256 + LSB Trigger an A/D conversion on the current channelInput voltage = A/D value / 32768 * Full-scale voltage Trigger D SCAN, FIFO, and Interrupt OperationClken Clksel Conversion or ScanInterrupt Operation Fifo OperationFifoen Fifoth Scanen Fifoen =Ainte Fifoen Scanen Guidelines for Selecting Fifo Use Fifoen and FifothOperation Table Analog Output Overview Generating AN Analog Output Reference Voltages Autocalibration Operation12.2 A/D calibration 12.3 D/A CalibrationDigital I/O Operation Optocoupler Operation Procedure for enabling interrupts on selected edgesPolarity and logic readback Edge detection assumes OENn = 1 to enable edge detectionRelay Operation Counter 1 Counting/Totalizing Functions COUNTER/TIMER OperationCounter 0 A/D Sample Control Counter Command SequencesCounter Outpbase+15,0x01 Outpbase+15,0x81 General SpecificationsAutocalibration