Diamond Power Products MM-48-AT user manual Trigger an A/D conversion on the current channel

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8.3 Trigger an A/D conversion on the current channel

After the above steps are completed, start the A/D conversion by writing a 1 to the ADSTART bit in Base + 8. This write operation only triggers the A/D if the CLKEN bit is 0 to disable hardware triggering and enable software triggering. Otherwise the A/D will only trigger when the selected clock or trigger signal occurs. CLKEN should always be 0 when controlling A/D conversions in software.

8.4 Wait for the conversion to finish

The A/D converter takes up to 5 microseconds to complete a conversion. Most processors and software can operate fast enough so that if you try to read the A/D converter immediately after writing to base + 0, you will beat the A/D converter and get invalid data. Therefore the A/D converter provides a status signal ADBUSY to indicate whether it is busy or idle. This bit can be read back as bit 7 in the status register at Base + 9. When the A/D converter is busy (performing an A/D conversion), this bit is 1, and when the A/D converter is idle (conversion is done and data is available), this bit is 0. Here is a pseudocode explanation:

Status = read(base+9) AND 128 // or Status = read(base+9) AND 80 Hex

If Status = 0 then conversion is complete, else A/D converter is busy

Keep repeating this procedure until Status = 0.

8.5 Read the data from the board

Once the conversion is complete, you can read the data back from the A/D converter. The data is 16 bits wide and is read back in two 8-bit bytes. The following pseudocode illustrates how to construct the 16-bit A/D value from these two bytes:

LSB = read(base)
MSB = read(base+1)
Data = MSB * 256 + LSB	// combine the 2 bytes into a 16-bit value

The final data is interpreted as a signed value ranging from –32768 to +32767.

⇒Note: The data range always includes both positive and negative values, even if the board is set to a unipolar input range. The data must now be converted to volts or other engineering units by using a conversion formula as shown on the next page.

Diamond-MM-48-AT User Manual V1.01

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Contents DIAMOND-MM-48-AT Table of Contents Description DIAMOND-MM-48-AT Board Drawing J3 Analog and Digital I/O Signal Name DefinitionO Header Pinout and PIN Description Optoisolated input contacts Signal Name Definition Relay output contactsJ4 Relays and Optocouplers Base Address Board ConfigurationBase Address Jumper Position Hex Decimal Interrupt Level SelectionAnalog Input Range Optocoupler PolarityReserved LSB MSB OverviewBase + Write Function Read Function Write operations Register Map Bit AssignmentsDA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 Read operationsBase + Write Register DefinitionsDefinitions Base + ReadHIGH3 HIGH2 HIGH1 HIGH0 LOW3 LOW2 LOW1 LOW0 AD9 AD8Base + Read/Write A/D Channel Register Base + Read/Write Relay Control Port Base + Read/Write Digital I/O Configuration RegisterRELAY7 RELAY6 RELAY5 RELAY4 RELAY3 RELAY2 RELAY1 RELAY0 DIR3 DIR2 DIR1 DIR0Base + Read Digital I/O Data and Edge Status DIO3 DIO2 DIO1 DIO0DEDGE3 DEDGE2 DEDGE1 DEDGE0 DIO3 DIO2 DIO1 DIO0 OEN3 OEN2 OEN1 OEN0 POL3 POL2 POL1 POL0OEDGE3 OEDGE2 OEDGE1 OEDGE0 OPTO3 OPTO2 OPTO1 OPTO0 Base + Write Channel and Control RegisterDaupdt DACH2 DACH1 DACH0 Dapre Daprld Reset Fiforst Adstart Base + Write Command RegisterPOL ADCH3 ADCH2 ADCH1 ADCH0 Base + Read Status RegisterCKSEL1 CKFRQ1 CKFRQ0 Scnint Clken Clksel Base + Write Configuration RegisterAdbusy Dabusy CKSEL1 CKFRQ1 CKFRQ0 Scnint Clken Clksel Base + Read Configuration & Status RegisterFifoth Fifoen Scanen Base + Write Fifo Control RegisterBase + Read Fifo Status Register OVF Fifoth Fifoen ScanenClrt Clrd Clro Clra Tinte Dinte Ointe Ainte Base + Write Interrupt Control RegisterTint Dint Oint Aint Tinte Dinte Ointe Ainte Base + Read Interrupt Status RegisterBase + Read/Write Counter/Timer D23 Base + Read/Write Counter/Timer D7Base + Read/Write Counter/Timer D15 Ctrno Base + Write Counter/Timer Control RegisterCtrno Latch Gtdis Gten Ctdis Cten Load CLR Base + Read/Write Eeprom / TrimDAC Address Register Base + Read/Write Eeprom / TrimDAC Data RegisterBase + Write Calibration Control Register Base + Write Eeprom Access Key RegisterBase + Read Calibration Status Register Base + Read Fpga Revision CodeResolution Analog Input Ranges and ResolutionInput Ranges Single Ended and Differential InputsPerforming AN A/D Conversion LSB = readbase MSB = readbase+1 Data = MSB * 256 + LSB Trigger an A/D conversion on the current channelInput voltage = A/D value / 32768 * Full-scale voltage Trigger D SCAN, FIFO, and Interrupt OperationClken Clksel Conversion or ScanInterrupt Operation Fifo OperationFifoen Fifoth Scanen Fifoen =Ainte Fifoen Scanen Guidelines for Selecting Fifo Use Fifoen and FifothOperation Table Analog Output Overview Generating AN Analog Output Reference Voltages Autocalibration Operation12.2 A/D calibration 12.3 D/A CalibrationDigital I/O Operation Optocoupler Operation Procedure for enabling interrupts on selected edgesPolarity and logic readback Edge detection assumes OENn = 1 to enable edge detectionRelay Operation Counter 1 Counting/Totalizing Functions COUNTER/TIMER OperationCounter 0 A/D Sample Control Counter Command SequencesCounter Outpbase+15,0x01 Outpbase+15,0x81 General SpecificationsAutocalibration