Atmel STK594 manual Table of Contents

Page 3

Table of Contents

Section 1

 

 

 

Introduction

...........................................................................................

1-1

1.1

Features

1-2

 

 

 

 

Section 2

 

 

 

Using the STK594 Top Module

2-1

2.1

Preparing the STK500 for Use with the STK594

2-1

2.1.1 Adjusting VTARGET for the AT94K Devices

2-1

2.1.2 Connecting the STK594 to the STK500 Starter Kit

2-1

2.2

PORT Connectors

2-2

2.2.1

PORT E

2-2

2.3

Programming the AT94K Devices

2-3

2.4

JTAG Connector

2-3

2.5

TOSC Switch

2-4

2.6

Universal Asynchronous Receiver Transmitter (UART)

2-4

2.6.1

Second RS-232C Port

2-4

2.7

Two-Wire Serial Interface (TWSI)

2-5

2.7.1 Description of Configuration Memory Pins

2-5

2.8

External Interrupts

2-5

2.9

Split Power Supply Support

2-6

2.10

XTAL Switch

2-6

2.11

Reset Switches

2-6

 

 

 

 

Section 3

 

 

 

Installing System Designer

3-1

3.1

System Requirements

3-1

3.2

System Designer Installation

3-2

3.3

Configuration Programming System (CPS) Installation

3-2

3.4

System Designer Licensing

3-2

3.4.1 Requesting a System Designer License

3-2

3.4.2 Configuring the System Designer License

3-3

3.4.3 Testing the System Designer License

3-3

3.4.4

Troubleshooting

3-3

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Contents STK594 User Guide Page Table of Contents Technical Specifications STK594 Top Module for STK500 Section IntroductionFeatures Preparing the STK500 for Use with the STK594 Section Using the STK594 Top ModuleAdjusting Vtarget for the AT94K Devices Connecting the STK594 to the STK500 Starter KitPort E Port ConnectorsJtag Tosc Switch Universal Asynchronous Receiver Transmitter UartSecond RS-232C Port Two-Wire Serial Interface Twsi ExternalInterrupts Xtal Switch Split Power Supply SupportSection Installing System Designer SystemRequirements System Designer Installation Configuration Programming System CPS InstallationLicensing Configuring the System Designer License Installing System Designer Description Section Using System DesignerCreating a Project Design FlowUsing System Designer Using System Designer Using System Designer Using System Designer Assembling the Microcontroller Source Code Fpga SourceFile Interface AVR-FPGAFpga I/O FPGA-AVR I/O RoutePlace and Route Design ConstraintsBitstream Generation Programming and Design Execution Hardware SetupUsing System Designer Select Low under A2 Bit Level Running the DesignConnections Section Technical SpecificationsSystem Unit Operating ConditionsTechnical Specifications Section Complete Schematics Complete Schematics CON52 GND AUXI0 AUXO0 AUXI1 Cclk VCC VDD Vout Schematics Complete Schematics Atmel Headquarters