Atmel STK594 manual GND AUXI0 AUXO0 AUXI1

Page 36

2819A–FPSLI–07/02

6-4

FPSLIC STK594 User Guide

5

4

3

2

1

AUX_I[1..0]

AUX_I[1..0]

AUX_O[1..0]

AUX_O[1..0]

D

J4

J5

D

GND

GND

GND

GND

1

2

1

2

AUX_I0

AUX_O0

AUX_I1

AUX_O1

3

4

3

4

PCM7

PCM6

PBM7

PBM6

5

6

5

6

PCM5

PCM4

PBM5

PBM4

7

8

7

8

PCM3

PCM2

PBM3

PBM2

9

10

9

10

PCM1

PCM0

PBM1

PBM0

11

12

11

12

VADJ

AREFT

AREFT

DSIT

DSOT

DSOT

VADJ

13

14

DSIT

13

14

RST

PET2

DCKT

DCST

RST

15

16

DCKT

15

16

DCST

PET1

PET0

XT1

XT2

17

18

XT1

17

18

XT2

GND

GND

VTG

VTG

19

20

19

20

VTG

VTG

GND

GND

21

22

21

22

PCT7

PCT6

PBT7

PBT6

23

24

23

24

PCT5

PCT4

PBT5

PBT4

25

26

25

26

PCT3

PCT2

PBT3

PBT2

27

28

27

28

PCT1

PCT0

PBT1

PBT0

29

30

29

30

PAT7

PAT6

PDT7

PDT6

31

32

31

32

PAT5

PAT4

PDT5

PDT4

33

34

33

34

PAT3

PAT2

PDT3

PDT2

35

36

35

36

PAT1

PAT0

PDT1

PDT0

37

38

37

38

GND

GND

GND

GND

39

40

39

40

CON40A

CON40A

C

PAT[7..0]

PDT[7..0]

C

PAT[7..0]

PDT[7..0]

PCT[7..0]

PCT[7..0]

PBT[7..0]

PBT[7..0]

PET[2..0]

PET[2..0]

PBM[7..0]

PBM[7..0]

PCM[7..0]

PCM[7..0]

PET[7..0]

PET[7..0]

PET0

J6

PET1

VCC

VTG

TCK

J7

GND

1

2

TCK

1

2

PET2

PET3

TDO

VTG

3

4

TDO

3

4

PET4

PET5

TMS

RST

RST

5

6

TMS

5

6

PET6

PET7

VTG

7

8

7

8

B

GND

VTG

TDI

GND

B

9

10

TDI

9

10

CON10A

CON10A

cSDA

J8

cSCL

cSDA

1

2

cSCL

cSER_EN

cSER_EN

3

4

VCC

VCC

VCC

INTP0

J9

INTP1

CON4A

INTP0

1

2

INTP1

INTP2

INTP3

VCC

INTP2

3

4

INTP3

CON4A

C11

C12

C13

J10

0.1 uF

0.1 uF

0.1 uF

RXD

RXD

1

2

TXD

TXD

CTS

RTS

CTS

3

4

RTS

R4

CON4A

2K7

RX0

J11

TX0

SDA

J12

SCL

RX0

1

2

TX0

SDA

1

2

SCL

RX1

TX1

RX1

3

4

TX1

CON2A

CON4A

A

A

TOSC1

J13

TOSC2

TOSC1

1

2

TOSC2

Title STK594 : Headers

CON2A

Size B

Document Number CHW5472

Rev A

Date: Friday, April 26, 2002

Sheet 3 of 6

5

4

3

2

1

Complete Schematics

Image 36

Contents STK594 User Guide Page Table of Contents Technical Specifications Section Introduction STK594 Top Module for STK500Features Section Using the STK594 Top Module Adjusting Vtarget for the AT94K DevicesConnecting the STK594 to the STK500 Starter Kit Preparing the STK500 for Use with the STK594Port Connectors Port EJtag Tosc Switch Universal Asynchronous Receiver Transmitter UartSecond RS-232C Port Two-Wire Serial Interface Twsi ExternalInterrupts Split Power Supply Support Xtal SwitchSection Installing System Designer SystemRequirements System Designer Installation Configuration Programming System CPS InstallationLicensing Configuring the System Designer License Installing System Designer Section Using System Designer DescriptionDesign Flow Creating a ProjectUsing System Designer Using System Designer Using System Designer Using System Designer Assembling the Microcontroller Source Code Fpga SourceFile AVR-FPGA InterfaceRoute Fpga I/O FPGA-AVR I/ODesign Constraints Place and RouteBitstream Generation Hardware Setup Programming and Design ExecutionUsing System Designer Running the Design Select Low under A2 Bit LevelSection Technical Specifications System UnitOperating Conditions ConnectionsTechnical Specifications Section Complete Schematics Complete Schematics CON52 GND AUXI0 AUXO0 AUXI1 Cclk VCC VDD Vout Schematics Complete Schematics Atmel Headquarters