Atmel STK594 manual Design Constraints, Place and Route

Using System Designer

2.Select Open EDIF Netlist and Browse to select COUNTER.EDF, then press OK. Figaro should open and complete the Open, Map, and Parts steps automatically, once completed the Figaro Batch Options dialog appears, see Figure 4-15.

Figure 4-15.Figaro Batch Options Dialog

The Figaro Batch Options allows for the setting of Design Constraints (i.e. Pin Lock- ing) and Place and Route quality:

Design Constraints

a.Press Import Constraints. Alternatively, we could have used the Assign Pin Locks GUI to perform the pin locking, but since a *.PIN file is supplied, the import method will be used.

b.Select COUNTER.PIN and press OK.

Place and Route

a.Use the default setting for Quality. Quality sets the trade-off between Figaro’s speed and the efficiency of the Place & Route result, see the online help for further information.

b.Use the default setting for Timing Driven Design. Checking the Timing Driven Design box allows Figaro to take account of critical paths when performing the Place & Route, see the online help for further information.

c.Press Compile, once completed the Figaro IDS Compile button will turn green.

d.Select Exit from the File menu, when prompted to save your design select Yes.

4-10

FPSLIC STK594 User Guide

2819A–FPSLI–07/02