8. INPUT OUTPUT SIGNAL SPECIFICATOINS
( 1 ) HD/VD Output Amplitude Specifications
HD |
|
|
| 4.5V |
|
|
0V
VD 
4.5V
0V
The amplitude level is the representative value when ter- minated with 10kΩ . Output is enabled when the rear panel HD/VD signal input/output switch is set to the INT side.
( 4 ) HD Input Specifications
2.0 to
5.0
5H to 21H
* Input impedance: 75Ω or 10kΩ or greater
* Input amplitude 2.0 to 5.0
*Voltage and pulse width were measured at pin 6 of the
( 2 ) VIDEO INDEX Output Specifications
( 5 ) Trigger Pulse Specifications
2.0 to �
5.0
2.0 ∝ s to 5.0 ∝ s
The amplitude level is the representative value when ter- minated with 10kΩ .
( 3 ) VD Input Specifications
4.5V
More than 2 ∝ s
More than 2 ∝ s
2～5.0V
0～0.4V
(Positive polarity mode)
2～5.0V
0～0.4V
(Negative polarity mode)
0V
525H (Partial scanning OFF)
175H (Partial scanning ON)
* Input impedance: 75W or 1kΩ or greater
* Input amplitude 2.0 to 5.0
*Voltage and pulse width were measured at pin 7 of the
*Input impedance: 10kΩ or greater
*Voltage and pulse width were measured at pin 11 of the
( 6 ) External HD/VD Input Phase Specifications
External HD rising edge
100
External HD
100
Unit : Clock
1 clk=40.74 nsec
Center
The phase relationship of the external HD and VD should correspond to the center phase (i.e., the external HD falling edge) as illustrated in the above diagram.
External VD falling edge:
Please input within about 100 clock cycles of the standard center phase.
Note that V sync of the video is output with a delay of about 1H from the external VD at the time of
In the normal mode:
Continuously with the HD period of 31.78 ms and VD period of 16.68 ms (partial scanning ON: 5.56 ms).
Phase timing is as illustrated in the above diagram (with only the falling edge applicable).
In the reset-restart/external trigger mode:
Continuously with the HD period of 31.78 ms. VD (reset) is at an arbitrary timing with the phase of HD being within the standard of the above diagram.
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