GE 90-70 manual CPU Architecture, Expansion Memory Board, Watchdog Timer

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CPU Architecture

The CGR772 and CGR935 have an 80486DX4 microprocessor, on-board memory, and a dedicated VLSI processor for performing Boolean operations. The CGR772 and CGR935 interface to serial ports and the system bus. The microprocessor provides all fundamental sweep and operation control, plus execution of non-Boolean functions. Boolean functions are handled by the dedicated VLSI, Boolean Coprocessor (BCP).

Model

Speed

Processor

Input

Output

Expansion

Floating

 

(MHz)

 

Points

Points

Memory

Point Math

 

 

 

 

 

 

 

CGR772

96

80486DX4

2048

2048

512K Bytes

Yes

 

 

 

 

 

 

 

CGR935

96

80486DX4

12288

12288

1 Megabyte

Yes

 

 

 

 

 

 

 

Expansion Memory Board

Program and data memory are provided by an attached expansion memory board with 512K Bytes of user memory for CGR772 and 1 Megabyte of user memory for CGR935. The expansion memory board provides RAM memory for program and data storage. Error checking is provided by a CPU checksum routine. Logic program memory is continually error-checked by the CPU as a background task. Memory parity errors are reported to the microprocessor when they occur.

The RAM memory on the expansion memory board is backed-up by the Lithium battery mounted on the CPU module.

Watchdog Timer

The CPU provides a watchdog timer to catch certain failure conditions. The value of this timer can be set from 10 milliseconds to 1000 milliseconds. The default is 200 milliseconds. The watchdog timer resets at the beginning of each sweep. The watchdog timer should be set to allow for the expected scan plus two fail wait times.

GFK-1527A

Chapter 2 System Components

2-3

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Contents GE Fanuc Automation GFL-002 Content of This Manual PrefaceRelated Publications Preface Contents Contents Chapter Fault Detection Appendix a Cabling Information Introduction Definition of TermsEnhanced Hot Standby CPU Redundancy Using the Redundancy CPU for Non-Redundant Operation Compatibility with CPU780Features not Available with Redundancy CPUs Redundancy CPUs as Compared to Other Series 90-70 CPUsDifferences in Operation for Redundancy CPUs Enhanced Redundancy CPU Module Redundancy Communications ModuleRedundant Racks Systems for Enhanced Hot Standby CPU RedundancyGenius I/O Local I/OCable Connections Enhanced Hot Standby CPU Redundancy System with Local I/O Local I/0 Can beControl Strategies GHS Control StrategyGDB Control Strategy Basic Enhanced Hot Standby Operation Output Control with GHSOutput Control with GDB Basic CPU Redundancy Setups Single Bus with Preferred Master GHS Control StrategySingle Bus with Floating Master GDB Control Strategy Critical Data + Redundant Outputs TransferredDual Bus with Floating Master GDB Control Strategy Paired GBC = INT/EXT Internal ExternalOnline Programming On-Line RepairDuplex CPU Redundancy For Installation Instructions System ComponentsSystem Racks Features Redundancy CPUWatchdog Timer CPU ArchitectureExpansion Memory Board CPU Features Memory Protect KeyswitchBattery Connectors CPU LEDsCPU Mode Switch PortRedundancy Communications Module Unit Select PushbuttonConnector RCM Status LedsConnectors Bus Transmitter ModuleBus Transmitter Module Status LEDs Bus Receiver Module Cables and TerminationBus Receiver Module Status LEDs Genius Bus Controller Location of GBCs and BlocksSingle Bus Genius Networks Dual Bus Genius NetworksBus Controller LEDs Configuration Requirements Programmer Connection for ConfigurationOne Application Program in Both PLCs Program Folders in Control Programming SoftwareCPU Configuration Parameters Program Folders in LogicmasterConfiguring Shared I/O References Parameter Default Range DescriptionFinding the Memory Available for Application Program Storage System Communications Window ConsiderationsRack Module Configuration Parameters Bus Controller Configuration ParametersGenius I/O Block Configuration Parameters Normal Operation Powerup of a Redundant CPU Incompatible Configurations Resynchronization of a Redundant CPUGHS Control Strategy GDB Control StrategyReferences for CPU Redundancy Ovrpre %S Reference Not AvailableScan Synchronization Sweep Time SynchronizationOutput Data Transfer to the Backup Unit AT aData Transfer Time Fail Wait TimeGFK-1527A Normal Operation Programming a Data Transfer from Backup Unit to Active Unit Data Transfer ExampleDisabling Data Transfer Copy in Backup Unit Svcreq #43 Command Block for Svcreq #43 Backup Qualification with Svcreq #43 Validating the Backup PLCs Input ScanValidating the Backup PLCs Logic Solution Switching Control to the Backup Unit Switching TimesRUN Disabled Mode RUN Disabled Mode for GHS Control StrategyExample 1 Role switches allowed on both units Example 2 Role switches allowed on both units Example 3 Role switches not allowed on either unitExample 4 Role switches allowed on both units Backup Active RUN Disabled Mode for GDB Control Strategy Example 8 InvalidFinding the Words to Checksum Each Sweep CGR772 CGR935Finding the Background Window Time Finding the Total Sweep TimeTimer and PID Function Blocks Miscellaneous Operation InformationTimed Contacts Multiple I/O Scan SetsStop to RUN Mode Transition Sequential Function Chart Programming SFCDebugger Background Window TimeGenius Bus Controller Switching Ethernet Global Data in a Redundancy CPU Ethernet Global Data ConsumptionEthernet Global Data Production Sntp TimestampingFault Detection Configuration of Fault ActionsFault Detection PLC Fault Table Messages for Redundancy Message Fault Description Corrective ActionWith redundancy in other fault groups Fault Response Faulting the Redundancy Communications Module Losing a LinkFault Actions in a CPU Redundancy System Configurable Faults Fault Group Type DescriptionNon-Configurable Fault Group Fatal Faults on Both Units in the Same SweepOn-Line Repair Power Supply Maintaining Parallel Bus TerminationOn-Line Repair Recommendations RacksCentral Processor Unit Redundancy Communications Module and CablesRedundancy Communications Link Failures Single Bus Networks Bus faults Bus Transmitter ModuleGenius Bus Controller Genius BusDual Bus Networks Genius BlocksSpecifications Cabling InformationIC690CBL714A Multi-drop Cable PurposeConnector a Connector A, 15-pin Female Battery connectors Bus Controller, Genius IndexIndex Online programming Online repair Svcreq