Albatron Technology user manual BdiGDB for GNU Debugger, BDI2000 ARM11/Cortex-A8

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bdiGDB for GNU Debugger, BDI2000 (ARM11/Cortex-A8)

User Manual 25

 

 

 

WBIN address filename

Write a binary image to the selected memory place. The binary image is

 

read via TFTP from the host. Up to 4 such entries are supported.

 

 

address

the memory address

 

 

 

filename

the filename including the full path

 

 

 

Example:

WBIN 0x4000 pagetable.bin

 

 

RM8 address value

Read a byte (8bit) from the selected memory place.

 

 

 

address

the memory address

 

 

 

Example:

RM8 0x00000000

 

 

RM16 address value

Read a half word (16bit) from the selected memory place.

 

 

address

the memory address

 

 

 

Example:

RM16 0x00000000

 

 

RM32 address value

Read a word (32bit) from the selected memory place.

 

 

 

address

the memory address

 

 

 

Example:

RM32 0x00000000

 

 

MMAP start end

Because a memory access to an invalid memory space via JTAG leads to

 

 

a deadlock, this entry can be used to define up to 32 valid memory ranges.

 

 

If at least one memory range is defined, the BDI checks against this

 

 

range(s) and avoids accessing of not mapped memory ranges.

 

 

start

the start address of a valid memory range

 

 

end

the end address of this memory range

 

 

Example:

MMAP 0xFFE00000 0xFFFFFFFF

;Boot ROM

 

DELAY value

Delay for the selected time.

 

 

 

value

the delay time in milliseconds (1...30000)

 

 

Example:

DELAY 500 ; delay for 0.5 seconds

 

 

CLOCK value

This entry allows to change the JTAG clock frequency during processing

 

 

of the init list. But the final JTAG clock after processing the init list is taken

 

 

from the CLOCK entry in the [TARGET] section. This entry maybe of inter-

 

 

est to speed-up JTAG clock as soon as possible (after PLL setup).

 

 

value

see CLOCK parameter in [TARGET] section

 

 

Example:

CLOCK 2 ; switch to 8 MHz JTAG clock

 

 

 

 

 

 

 

 

 

 

 

© Copyright 1997-2007 by ABATRON AG Switzerland

V 1.04

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Contents BdiGDB Using bdiGDB InstallationIntroduction BDI2000 BDI ConfigurationAppendices Troubleshooting Maintenance TrademarksBDI2000 IntroductionBDI Configuration Connecting the BDI2000 to Target InstallationFor BDI Main / Target a connector signals see table on next Jtag Test Reset BDI Main / Target a Connector SignalsChanging Target Processor Type Adaptive Clocking For Target B connector signals see table on nextReturned Jtag Test Clock BDI Target B Connector SignalsExternal power supply Target system Please switch on the system in the following sequence142 Power Supply from Target SystemBuilt in LED indicates the following BDI states Status LED «MODE»RS232 Connector Ethernet communication BASE-T ConnectorPC Host Name DescriptionOverview of an installation / configuration process Installation of the Configuration SoftwareActivating Bootp Load/Update the BDI firmware/logic Build the setup tool1 Configuration with a Linux / Unix host Following the steps to bring-up a new BDI2000Transmit the initial configuration parameters Check configuration and exit loader modefile name without any path For more information about Tftp use man tftpdOry / programmable logic 2 Configuration with a Windows hostReassemble the unit as described in Appendix «Maintenance» Recover procedureTftp server for Windows NT Testing the BDI2000 to host connectionPrinciple of operation Using bdiGDBConfiguration File Part Init BdiGDB for GNU Debugger, BDI2000 ARM11/Cortex-A8 ROM on the target, select ROM as the format Using a startup program to initialize the target systemFormat COFF, SREC, AOUT, BIN, ELF or ROM Example Format CoffCputype ARM1136 Part TargetNone PushpullStop HaltRUN LoadonlyHard SoftBreakmode Hard CoreDaisy chained Jtag devices Low level Jtag scan chain configuration Part Host Dump filename Prompt ARM11Part Flash BLOCK, CHIP, Unlock AM29BX8 MIRRORX8, I28BX8 STRATAX8, AT49X8 Supported Flash MemoriesTor. In other words, this is the size of one sector in bytes Or use the Telnet unlock commandPart Regs Entry in the configuration file Example for a register definitionRegister definition file Connecting to the target Target setupDebugging with GDB Breakpoint Handling GDB monitor commandTarget serial I/O via BDI Target DCC I/O via BDI Telnet Interface Dump Command listSome examples CP15 ID register CRn = 0, opcode2 = CPxx RegistersCP15 Cache Type CRn = 0, opcode2 = CP15 Invalidate I cache line CRn = 7, opcode2 = 1, CRm =Multi-Core Support BASE-T SpecificationsDeclaration of Conformity CE Environmental noticeWarranty Problem Troubleshootingfirmware can not be loaded Possible reasonsUnplug the cables MaintenanceReinstallation All trademarks are property of their respective holders Trademarks