Albatron Technology ARM11/Cortex-A8 user manual Using bdiGDB, Principle of operation

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bdiGDB for GNU Debugger, BDI2000 (ARM11/Cortex-A8)

User Manual 22

3 Using bdiGDB

3.1 Principle of operation

The ﬁrmware within the BDI handles the GDB request and accesses the target memory or registers via the JTAG interface. There is no need for any debug software on the target system. After loading the code via TFTP debugging can begin at the very ﬁrst assembler statement.

Whenever the BDI system is powered-up the following sequence starts:

Power On

	initial	no
	configuration	no
	configuration
	valid?
	yes

Get configuration file

via TFTP

Process target init list

activate BDI2000 loader

Power OFF

Load program code

via TFTP and set the PC

RUN selected?

Start loaded program code

Process GDB request

Power OFF

© Copyright 1997-2007 by ABATRON AG Switzerland

V 1.04

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Contents BdiGDB Introduction InstallationUsing bdiGDB BDI2000 BDI ConﬁgurationTroubleshooting Maintenance Trademarks AppendicesIntroduction BDI2000BDI Conﬁguration Connecting the BDI2000 to Target InstallationFor BDI Main / Target a connector signals see table on next BDI Main / Target a Connector Signals Jtag Test ResetChanging Target Processor Type For Target B connector signals see table on next Adaptive ClockingBDI Target B Connector Signals Returned Jtag Test ClockPlease switch on the system in the following sequence External power supply Target systemPower Supply from Target System 142Status LED «MODE» Built in LED indicates the following BDI statesRS232 Connector PC Host BASE-T ConnectorEthernet communication Name DescriptionOverview of an installation / conﬁguration process Installation of the Conﬁguration SoftwareActivating Bootp 1 Conﬁguration with a Linux / Unix host Build the setup toolLoad/Update the BDI ﬁrmware/logic Following the steps to bring-up a new BDI2000ﬁle name without any path Check conﬁguration and exit loader modeTransmit the initial conﬁguration parameters For more information about Tftp use man tftpd2 Conﬁguration with a Windows host Ory / programmable logicRecover procedure Reassemble the unit as described in Appendix «Maintenance»Testing the BDI2000 to host connection Tftp server for Windows NTUsing bdiGDB Principle of operationConﬁguration File Part Init BdiGDB for GNU Debugger, BDI2000 ARM11/Cortex-A8 Format COFF, SREC, AOUT, BIN, ELF or ROM Example Using a startup program to initialize the target systemROM on the target, select ROM as the format Format CoffNone Part TargetCputype ARM1136 PushpullRUN HaltStop LoadonlyBreakmode Hard SoftHard CoreDaisy chained Jtag devices Low level Jtag scan chain conﬁguration Part Host Prompt ARM11 Dump ﬁlenamePart Flash BLOCK, CHIP, Unlock Supported Flash Memories AM29BX8 MIRRORX8, I28BX8 STRATAX8, AT49X8Or use the Telnet unlock command Tor. In other words, this is the size of one sector in bytesPart Regs Entry in the conﬁguration ﬁle Example for a register deﬁnitionRegister deﬁnition ﬁle Connecting to the target Target setupDebugging with GDB GDB monitor command Breakpoint HandlingTarget serial I/O via BDI Target DCC I/O via BDI Telnet Interface Command list DumpCP15 Cache Type CRn = 0, opcode2 = CPxx RegistersSome examples CP15 ID register CRn = 0, opcode2 = CP15 Invalidate I cache line CRn = 7, opcode2 = 1, CRm =Multi-Core Support Speciﬁcations BASE-TEnvironmental notice Declaration of Conformity CEWarranty ﬁrmware can not be loaded TroubleshootingProblem Possible reasonsMaintenance Unplug the cablesReinstallation Trademarks All trademarks are property of their respective holders