Albatron Technology ARM11/Cortex-A8 user manual BLOCK, CHIP, Unlock

Page 35

bdiGDB for GNU Debugger, BDI2000 (ARM11/Cortex-A8)

User Manual 35

ERASE addr [increment count] [mode [wait]]

The flash memory may be individually erased or unlocked via the Telnet interface. In order to make erasing of multiple flash sectors easier, you can enter an erase list. All entries in the erase list will be processed if you enter ERASE at the Telnet prompt without any parameter. This list is also used if you enter UNLOCK at the Telnet without any parameters. With the "in- crement" and "count" option you can erase multiple equal sized sectors with one entry in the erase list.

address

Address of the flash sector, block or chip to erase

increment

If present, the address offset to the next flash sector

count

If present, the number of equal sized sectors to erase

mode

BLOCK, CHIP, UNLOCK

 

Without this optional parameter, the BDI executes a sec-

 

tor erase. If supported by the chip, you can also specify

 

a block or chip erase. If UNLOCK is defined, this entry is

 

also part of the unlock list. This unlock list is processed

 

if the Telnet UNLOCK command is entered without any

 

parameters.

wait

The wait time in ms is only used for the unlock mode. Af-

 

ter starting the flash unlock, the BDI waits until it pro-

 

cesses the next entry.

Example:

ERASE 0xff040000 ;erase sector 4 of flash

 

ERASE 0xff060000 ;erase sector 6 of flash

 

ERASE 0xff000000 CHIP ;erase whole chip(s)

 

ERASE 0xff010000 UNLOCK 100 ;unlock, wait 100ms

 

ERASE 0xff000000 0x10000 7 ; erase 7 sectors

Example for the ARM PID7T board (AM29F010 in U12):

[FLASH]

 

 

 

 

WORKSPACE

0x00000000

;Workspace in target RAM for faster programming algorithm

CHIPTYPE

AM29F

;Flash type

 

 

CHIPSIZE

0x20000

;The size of one flash chip in bytes

BUSWIDTH

8

;The width of the flash memory bus in bits (8 16 32)

FILE

C:\gdb\pid7t\bootrom.hex

;The file to program

ERASE

0x04000000

;erase sector

0

of flash SIMM

ERASE

0x04004000

;erase sector

1

of flash SIMM

ERASE

0x04008000

;erase sector

2

of flash SIMM

ERASE

0x0400C000

;erase sector

3

of flash SIMM

ERASE

0x04010000

;erase sector

4

of flash SIMM

ERASE

0x04014000

;erase sector

5

of flash SIMM

ERASE

0x04018000

;erase sector

6

of flash SIMM

ERASE

0x0401C000

;erase sector

7

of flash SIMM

the above erase list maybe replaced with:

ERASE

0x04000000 0x4000 8 ;erase 8 sectors

© Copyright 1997-2007 by ABATRON AG Switzerland

V 1.04

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Contents BdiGDB BDI2000 BDI Configuration InstallationUsing bdiGDB IntroductionAppendices Troubleshooting Maintenance TrademarksBDI2000 IntroductionBDI Configuration For BDI Main / Target a connector signals see table on next InstallationConnecting the BDI2000 to Target Jtag Test Reset BDI Main / Target a Connector SignalsChanging Target Processor Type Adaptive Clocking For Target B connector signals see table on nextReturned Jtag Test Clock BDI Target B Connector SignalsExternal power supply Target system Please switch on the system in the following sequence142 Power Supply from Target SystemBuilt in LED indicates the following BDI states Status LED «MODE»RS232 Connector Name Description BASE-T ConnectorEthernet communication PC HostActivating Bootp Installation of the Configuration SoftwareOverview of an installation / configuration process Following the steps to bring-up a new BDI2000 Build the setup toolLoad/Update the BDI firmware/logic 1 Configuration with a Linux / Unix hostFor more information about Tftp use man tftpd Check configuration and exit loader modeTransmit the initial configuration parameters file name without any pathOry / programmable logic 2 Configuration with a Windows hostReassemble the unit as described in Appendix «Maintenance» Recover procedureTftp server for Windows NT Testing the BDI2000 to host connectionPrinciple of operation Using bdiGDBConfiguration File Part Init BdiGDB for GNU Debugger, BDI2000 ARM11/Cortex-A8 Format Coff Using a startup program to initialize the target systemROM on the target, select ROM as the format Format COFF, SREC, AOUT, BIN, ELF or ROM ExamplePushpull Part TargetCputype ARM1136 NoneLoadonly HaltStop RUNCore SoftHard Breakmode HardDaisy chained Jtag devices Low level Jtag scan chain configuration Part Host Dump filename Prompt ARM11Part Flash BLOCK, CHIP, Unlock AM29BX8 MIRRORX8, I28BX8 STRATAX8, AT49X8 Supported Flash MemoriesTor. In other words, this is the size of one sector in bytes Or use the Telnet unlock commandPart Regs Register definition file Example for a register definitionEntry in the configuration file Debugging with GDB Target setupConnecting to the target Breakpoint Handling GDB monitor commandTarget serial I/O via BDI Target DCC I/O via BDI Telnet Interface Dump Command listCP15 Invalidate I cache line CRn = 7, opcode2 = 1, CRm = CPxx RegistersSome examples CP15 ID register CRn = 0, opcode2 = CP15 Cache Type CRn = 0, opcode2 =Multi-Core Support BASE-T SpecificationsDeclaration of Conformity CE Environmental noticeWarranty Possible reasons TroubleshootingProblem firmware can not be loadedUnplug the cables MaintenanceReinstallation All trademarks are property of their respective holders Trademarks
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