Albatron Technology ARM11/Cortex-A8 user manual Soft, Breakmode Hard, Core, Ahb

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bdiGDB for GNU Debugger, BDI2000 (ARM11/Cortex-A8)

User Manual 29

BREAKMODE mode

This parameter defines how breakpoints are implemented.

 

SOFT

This is the normal mode. Breakpoints are implemented

 

 

by replacing code with a BKPT instruction.

 

HARD

In this mode, the breakpoint hardware is used. Only 6

 

 

breakpoints at a time are supported.

 

 

Example:

BREAKMODE HARD

 

MEMACCES mode [wait] For Cortex-A8, this parameter defines how memory is accessed. Either via the ARM core by executing ld and st instructions or via the AHB access port. The current mode can also be changed via the Telnet interface. The optional wait parameter allows to define a time the BDI waits before it ex- pects that a value is ready or written. This allows to optimize download performance. The wait time is (8 x wait) TCK’s in Run-Test/Idle state.

The following modes are supported:

 

CORE

The CORE (default) mode requires that the core is halt-

 

 

ed and makes use of the memory management unit

 

 

(MMU) and cache.

 

AHB

The AHB access mode can access memory even when

 

 

the core is running but bypasses the MMU and cache.

 

Example:

MEMACCES CORE 5 ; 40 TCK's access delay

SIO port [baudrate]

When this line is present, a TCP/IP channel is routed to the BDI’s RS232

 

connector. The port parameter defines the TCP port used for this BDI to

 

host communication. You may choose any port except 0 and the default

 

Telnet port (23). On the host, open a Telnet session using this port. Now

 

you should see the UART output in this Telnet session. You can use the

 

normal Telnet connection to the BDI in parallel, they work completely inde-

 

pendent. Also input to the UART is implemented.

 

port

The TCP/IP port used for the host communication.

 

baudrate

The BDI supports 2400 ... 115200 baud

 

Example:

SIO 7 9600 ;TCP port for virtual IO

DCC port

When this line is present, a TCP/IP channel is routed to the ARM debug

 

communication channel (DCC). The port parameter defines the TCP port

 

used for this BDI to host communication.You may choose any port except

 

0 and the default Telnet port (23). On the host, open a Telnet session using

 

this port. Now you should see the DCC output in this Telnet session. You

 

can use the normal Telnet connection to the BDI in parallel, they work

 

completely independent. Also input to DCC is implemented.

 

port

The TCP/IP port used for the host communication.

 

Example:

DCC 7 ;TCP port for DCC I/O

© Copyright 1997-2007 by ABATRON AG Switzerland

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Contents BdiGDB Using bdiGDB InstallationIntroduction BDI2000 BDI ConfigurationAppendices Troubleshooting Maintenance TrademarksBDI2000 IntroductionBDI Configuration For BDI Main / Target a connector signals see table on next InstallationConnecting the BDI2000 to Target Jtag Test Reset BDI Main / Target a Connector SignalsChanging Target Processor Type Adaptive Clocking For Target B connector signals see table on nextReturned Jtag Test Clock BDI Target B Connector SignalsExternal power supply Target system Please switch on the system in the following sequence142 Power Supply from Target SystemBuilt in LED indicates the following BDI states Status LED «MODE»RS232 Connector Ethernet communication BASE-T ConnectorPC Host Name DescriptionActivating Bootp Installation of the Configuration SoftwareOverview of an installation / configuration process Load/Update the BDI firmware/logic Build the setup tool1 Configuration with a Linux / Unix host Following the steps to bring-up a new BDI2000Transmit the initial configuration parameters Check configuration and exit loader modefile name without any path For more information about Tftp use man tftpdOry / programmable logic 2 Configuration with a Windows hostReassemble the unit as described in Appendix «Maintenance» Recover procedureTftp server for Windows NT Testing the BDI2000 to host connectionPrinciple of operation Using bdiGDBConfiguration File Part Init BdiGDB for GNU Debugger, BDI2000 ARM11/Cortex-A8 ROM on the target, select ROM as the format Using a startup program to initialize the target systemFormat COFF, SREC, AOUT, BIN, ELF or ROM Example Format CoffCputype ARM1136 Part TargetNone PushpullStop HaltRUN LoadonlyHard SoftBreakmode Hard CoreDaisy chained Jtag devices Low level Jtag scan chain configuration Part Host Dump filename Prompt ARM11Part Flash BLOCK, CHIP, Unlock AM29BX8 MIRRORX8, I28BX8 STRATAX8, AT49X8 Supported Flash MemoriesTor. In other words, this is the size of one sector in bytes Or use the Telnet unlock commandPart Regs Register definition file Example for a register definitionEntry in the configuration file Debugging with GDB Target setupConnecting to the target Breakpoint Handling GDB monitor commandTarget serial I/O via BDI Target DCC I/O via BDI Telnet Interface Dump Command listSome examples CP15 ID register CRn = 0, opcode2 = CPxx RegistersCP15 Cache Type CRn = 0, opcode2 = CP15 Invalidate I cache line CRn = 7, opcode2 = 1, CRm =Multi-Core Support BASE-T SpecificationsDeclaration of Conformity CE Environmental noticeWarranty Problem Troubleshootingfirmware can not be loaded Possible reasonsUnplug the cables MaintenanceReinstallation All trademarks are property of their respective holders Trademarks
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