Albatron Technology ARM11/Cortex-A8 user manual Part Target, Cputype ARM1136, None, Pushpull

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bdiGDB for GNU Debugger, BDI2000 (ARM11/Cortex-A8)

User Manual 27

3.2.2 Part [TARGET]

The part [TARGET] defines some target specific values.

CPUTYPE type

This value gives the BDI information about the connected CPU.

 

type

The CPU type from the following list:

 

 

ARM1136, CORTEX-A8, OMAP3430

 

Example:

CPUTYPE ARM1136

CLOCK main [init] [SLOW]With this value(s) you can select the JTAG clock rate the BDI2000 uses when communication with the target CPU. The "main" entry is used after processing the initialization list. The "init" value is used after target reset until the initialization list is processed. If there is no "init" value defined, the "main" value is used all the times.

Adaptive clocking is only supported with BDI2000 Rev.B/C and needs a special target connector cable. Add also SLOW if the CPU clock frequency may fall below 6 MHz during adaptive clocking.

main,init:

0 = Adaptive

 

 

 

1

= 16 MHz

6

= 200 kHz

 

2

= 8 MHz

7

= 100 kHz

 

3

= 4 MHz

8

= 50 kHz

 

4

= 1 MHz

9

= 20 kHz

 

5

= 500 kHz

10 = 10 kHz

 

Example:

CLOCK 1 ; JTAG clock is 16 MHz

RESET type [time]

Normally the BDI drives the reset line during startup. If reset type is NONE

 

or SOFT, the BDI does not assert a hardware reset during startup. If reset

 

type SOFT is supported depends on the connected target.

 

type

NONE

 

 

SOFT (soft reset via a debug register)

 

 

HARD (default)

 

time

The time in milliseconds the BDI assert the reset signal.

 

Example:

RESET NONE ; no reset during startup

 

 

RESET SOFT ; reset ARM core via RCSR

 

 

RESET HARD 1000 ; assert RESET for 1 second

TRST type

Normally the BDI uses an open drain driver for the TRST signal. This is in

 

accordance with the ARM recommendation. For boards where TRST is

 

simply pulled low with a weak resistor, TRST will always be asserted and

 

JTAG debugging is impossible. In that case, the TRST driver type can be

 

changed to push-pull. Then the BDI actively drives also high level.

 

type

OPENDRAIN (default)

 

 

PUSHPULL

 

Example:

TRST PUSHPULL ; Drive TRST also high

© Copyright 1997-2007 by ABATRON AG Switzerland

V 1.04

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Contents BdiGDB BDI2000 BDI Configuration InstallationUsing bdiGDB IntroductionAppendices Troubleshooting Maintenance TrademarksBDI2000 IntroductionBDI Configuration Installation Connecting the BDI2000 to TargetFor BDI Main / Target a connector signals see table on next Jtag Test Reset BDI Main / Target a Connector SignalsChanging Target Processor Type Adaptive Clocking For Target B connector signals see table on nextReturned Jtag Test Clock BDI Target B Connector SignalsExternal power supply Target system Please switch on the system in the following sequence142 Power Supply from Target SystemBuilt in LED indicates the following BDI states Status LED «MODE»RS232 Connector Name Description BASE-T ConnectorEthernet communication PC HostInstallation of the Configuration Software Overview of an installation / configuration processActivating Bootp Following the steps to bring-up a new BDI2000 Build the setup toolLoad/Update the BDI firmware/logic 1 Configuration with a Linux / Unix hostFor more information about Tftp use man tftpd Check configuration and exit loader modeTransmit the initial configuration parameters file name without any pathOry / programmable logic 2 Configuration with a Windows hostReassemble the unit as described in Appendix «Maintenance» Recover procedureTftp server for Windows NT Testing the BDI2000 to host connectionPrinciple of operation Using bdiGDBConfiguration File Part Init BdiGDB for GNU Debugger, BDI2000 ARM11/Cortex-A8 Format Coff Using a startup program to initialize the target systemROM on the target, select ROM as the format Format COFF, SREC, AOUT, BIN, ELF or ROM ExamplePushpull Part TargetCputype ARM1136 NoneLoadonly HaltStop RUNCore SoftHard Breakmode HardDaisy chained Jtag devices Low level Jtag scan chain configuration Part Host Dump filename Prompt ARM11Part Flash BLOCK, CHIP, Unlock AM29BX8 MIRRORX8, I28BX8 STRATAX8, AT49X8 Supported Flash MemoriesTor. In other words, this is the size of one sector in bytes Or use the Telnet unlock commandPart Regs Example for a register definition Entry in the configuration fileRegister definition file Target setup Connecting to the targetDebugging with GDB Breakpoint Handling GDB monitor commandTarget serial I/O via BDI Target DCC I/O via BDI Telnet Interface Dump Command listCP15 Invalidate I cache line CRn = 7, opcode2 = 1, CRm = CPxx RegistersSome examples CP15 ID register CRn = 0, opcode2 = CP15 Cache Type CRn = 0, opcode2 =Multi-Core Support BASE-T SpecificationsDeclaration of Conformity CE Environmental noticeWarranty Possible reasons TroubleshootingProblem firmware can not be loadedUnplug the cables MaintenanceReinstallation All trademarks are property of their respective holders Trademarks