Albatron Technology ARM11/Cortex-A8 user manual Or use the Telnet unlock command

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bdiGDB for GNU Debugger, BDI2000 (ARM11/Cortex-A8)

User Manual 37

Note:

Some Intel flash chips (e.g. 28F800C3, 28F160C3, 28F320C3) power-up with all blocks in locked state. In order to erase/program those flash chips, use the init list to unlock the appropriate blocks:

WM16

0xFFF00000

0x0060

unlock block 0

WM16

0xFFF00000

0x00D0

 

WM16

0xFFF10000

0x0060

unlock block 1

WM16

0xFFF10000

0x00D0

 

 

....

 

 

WM16

0xFFF00000

0xFFFF

select read mode

or use the Telnet "unlock" command:

UNLOCK [<addr> [<delay>]]

 

addr

This is the address of the sector (block) to unlock

delay

A delay time in milliseconds the BDI waits after sending the unlock com-

 

mand to the flash. For example, clearing all lock-bits of an Intel J3 Strata

 

flash takes up to 0.7 seconds.

If "unlock" is used without any parameter, all sectors in the erase list with the UNLOCK option are processed.

To clear all lock-bits of an Intel J3 Strata flash use for example:

BDI> unlock 0xFF000000 1000

To erase or unlock multiple, continuos flash sectors (blocks) of the same size, the following Telnet commands can be used:

ERASE <addr> <step> <count>

UNLOCK <addr> <step> <count>

addr

This is the address of the first sector to erase or unlock.

step

This value is added to the last used address in order to get to the next sec-

 

tor. In other words, this is the size of one sector in bytes.

count

The number of sectors to erase or unlock.

The following example unlocks all 256 sectors of an Intel Strata flash ( 28F256K3) that is mapped to 0x00000000. In case there are two flash chips to get a 32bit system, double the "step" parameter.

BDI> unlock 0x00000000 0x20000 256

© Copyright 1997-2007 by ABATRON AG Switzerland

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Contents BdiGDB Using bdiGDB InstallationIntroduction BDI2000 BDI ConfigurationAppendices Troubleshooting Maintenance TrademarksBDI2000 IntroductionBDI Configuration Connecting the BDI2000 to Target InstallationFor BDI Main / Target a connector signals see table on next Jtag Test Reset BDI Main / Target a Connector SignalsChanging Target Processor Type Adaptive Clocking For Target B connector signals see table on nextReturned Jtag Test Clock BDI Target B Connector SignalsExternal power supply Target system Please switch on the system in the following sequence142 Power Supply from Target SystemBuilt in LED indicates the following BDI states Status LED «MODE»RS232 Connector Ethernet communication BASE-T ConnectorPC Host Name DescriptionOverview of an installation / configuration process Installation of the Configuration SoftwareActivating Bootp Load/Update the BDI firmware/logic Build the setup tool1 Configuration with a Linux / Unix host Following the steps to bring-up a new BDI2000Transmit the initial configuration parameters Check configuration and exit loader modefile name without any path For more information about Tftp use man tftpdOry / programmable logic 2 Configuration with a Windows hostReassemble the unit as described in Appendix «Maintenance» Recover procedureTftp server for Windows NT Testing the BDI2000 to host connectionPrinciple of operation Using bdiGDBConfiguration File Part Init BdiGDB for GNU Debugger, BDI2000 ARM11/Cortex-A8 ROM on the target, select ROM as the format Using a startup program to initialize the target systemFormat COFF, SREC, AOUT, BIN, ELF or ROM Example Format CoffCputype ARM1136 Part TargetNone PushpullStop HaltRUN LoadonlyHard SoftBreakmode Hard CoreDaisy chained Jtag devices Low level Jtag scan chain configuration Part Host Dump filename Prompt ARM11Part Flash BLOCK, CHIP, Unlock AM29BX8 MIRRORX8, I28BX8 STRATAX8, AT49X8 Supported Flash MemoriesTor. In other words, this is the size of one sector in bytes Or use the Telnet unlock commandPart Regs Entry in the configuration file Example for a register definitionRegister definition file Connecting to the target Target setupDebugging with GDB Breakpoint Handling GDB monitor commandTarget serial I/O via BDI Target DCC I/O via BDI Telnet Interface Dump Command listSome examples CP15 ID register CRn = 0, opcode2 = CPxx RegistersCP15 Cache Type CRn = 0, opcode2 = CP15 Invalidate I cache line CRn = 7, opcode2 = 1, CRm =Multi-Core Support BASE-T SpecificationsDeclaration of Conformity CE Environmental noticeWarranty Problem Troubleshootingfirmware can not be loaded Possible reasonsUnplug the cables MaintenanceReinstallation All trademarks are property of their respective holders Trademarks