Albatron Technology ARM11/Cortex-A8 user manual BDI Configuration

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bdiGDB for GNU Debugger, BDI2000 (ARM11/Cortex-A8)

User Manual

5

1.2 BDI Configuration

As an initial setup, the IP address of the BDI2000, the IP address of the host with the configuration file and the name of the configuration file is stored within the flash of the BDI2000.

Every time the BDI2000 is powered on, it reads the configuration file via TFTP. Following an example of a typical configuration file:

;bdiGDB configuration for ARM Integrator CM1136JF-S

;--------------------------------------------------

[INIT]

WM32 0x1000000C 0x00000005 ;REMAP=1, MISC LED ON

[TARGET]

 

 

CPUTYPE

 

ARM1136

 

CLOCK

 

1

;JTAG clock (0=Adaptive,1=16MHz,2=8MHz,3=4MHz, ...)

POWERUP

 

3000

;start delay after power-up detected in ms

ENDIAN

 

LITTLE

;memory model (LITTLE BIG)

VECTOR

 

CATCH 0x1f

;catch D_Abort, P_Abort, SWI, Undef and Reset

BREAKMODE

HARD

;SOFT or HARD

;

 

 

 

SCANPRED

0 0

;no JTAG devices before the ARM1136

SCANSUCC

1 4

;the ETMBUF after the ARM1136 core

;

 

 

 

[HOST]

 

 

 

IP

 

151.120.25.119

FILE

 

E:\cygwin\home\demo\pid7t\fibo.x

FORMAT

 

ELF

 

LOAD

 

MANUAL

;load file MANUAL or AUTO after reset

[FLASH]

 

 

 

WORKSPACE

0x00001000

;workspace in target RAM for fast programming algorithm

CHIPTYPE

AM29BX8

;Flash type (AM29F AM29BX8 AM29BX16 I28BX8 I28BX16)

CHIPSIZE

0x100000

;The size of one flash chip in bytes

BUSWIDTH

32

;The width of the flash memory bus in bits (8 16 32)

FILE

 

$arm1136.cfg

FORMAT

 

BIN 0x00010000

[REGS]

 

 

 

FILE

$reg1136.def

 

Based on the information in the configuration file, the target is automatically initialized after every re- set.

© Copyright 1997-2007 by ABATRON AG Switzerland

V 1.04

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Contents BdiGDB Using bdiGDB InstallationIntroduction BDI2000 BDI ConfigurationAppendices Troubleshooting Maintenance TrademarksBDI2000 IntroductionBDI Configuration For BDI Main / Target a connector signals see table on next InstallationConnecting the BDI2000 to Target Jtag Test Reset BDI Main / Target a Connector SignalsChanging Target Processor Type Adaptive Clocking For Target B connector signals see table on nextReturned Jtag Test Clock BDI Target B Connector SignalsExternal power supply Target system Please switch on the system in the following sequence142 Power Supply from Target SystemBuilt in LED indicates the following BDI states Status LED «MODE»RS232 Connector Ethernet communication BASE-T ConnectorPC Host Name DescriptionActivating Bootp Installation of the Configuration SoftwareOverview of an installation / configuration process Load/Update the BDI firmware/logic Build the setup tool1 Configuration with a Linux / Unix host Following the steps to bring-up a new BDI2000Transmit the initial configuration parameters Check configuration and exit loader modefile name without any path For more information about Tftp use man tftpdOry / programmable logic 2 Configuration with a Windows hostReassemble the unit as described in Appendix «Maintenance» Recover procedureTftp server for Windows NT Testing the BDI2000 to host connectionPrinciple of operation Using bdiGDBConfiguration File Part Init BdiGDB for GNU Debugger, BDI2000 ARM11/Cortex-A8 ROM on the target, select ROM as the format Using a startup program to initialize the target systemFormat COFF, SREC, AOUT, BIN, ELF or ROM Example Format CoffCputype ARM1136 Part TargetNone PushpullStop HaltRUN LoadonlyHard SoftBreakmode Hard CoreDaisy chained Jtag devices Low level Jtag scan chain configuration Part Host Dump filename Prompt ARM11Part Flash BLOCK, CHIP, Unlock AM29BX8 MIRRORX8, I28BX8 STRATAX8, AT49X8 Supported Flash MemoriesTor. In other words, this is the size of one sector in bytes Or use the Telnet unlock commandPart Regs Register definition file Example for a register definitionEntry in the configuration file Debugging with GDB Target setupConnecting to the target Breakpoint Handling GDB monitor commandTarget serial I/O via BDI Target DCC I/O via BDI Telnet Interface Dump Command listSome examples CP15 ID register CRn = 0, opcode2 = CPxx RegistersCP15 Cache Type CRn = 0, opcode2 = CP15 Invalidate I cache line CRn = 7, opcode2 = 1, CRm =Multi-Core Support BASE-T SpecificationsDeclaration of Conformity CE Environmental noticeWarranty Problem Troubleshootingfirmware can not be loaded Possible reasonsUnplug the cables MaintenanceReinstallation All trademarks are property of their respective holders Trademarks