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Konica Minolta
PCI-1712, PCI-1712L user manual
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Contents
Main
Quick Start
Unpacking
Driver Installation
Hardware Installation
Verifying your Installation
Device Installation
Page
Contents
Page
Page
Figures
Page
Tables
Page
Page
1. Introduction
1.1 Features
Page
1.2 Installation Guide
Page
1.3 Accessories
Page
2. Installation
2.1 Unpacking
2.2 Driver Installation
2.3 Hardware Installation
Page
Page
2.4 Device Setup & Configuration
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Page
2.5 Device Testing
Page
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3. Signal Connections
3.1 Overview
3.2 I/O Connector
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Chapter 3
Table 3-1: I/O Connector Signal Description (Part 3)
23 PCI-1712/1712L Users Manual
emaNlangiS ecnerefeR noitceriD noitpircseD
3.3 Analog Input Connections
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Page
3.4 Analog Output Connections
3.5 Field Wiring Considerations
4. Software Overview
4.1 Programming Choices
4.2 DLL Driver Programming Roadmap
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5. Principles of Operation
5.1 Analog Input Features
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5.2 Analog Output Features
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5.3 Digital I/O Features
5.4 Counter/Timer Features
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6. Calibration
6.1 VR Assignment
6.2 A/D Calibration
6.3 D/A Calibration
6.4 Calibration Utility
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69
Chapter 4
PCI-1712 Users Manual
A
A. Specification
Analog Input:
70
APPENDIX A
Analog Output: (PCI-1712 only)
Digital Input /Output:
Page
Page
73
APPENDIX B
LOCALBUS
_
B
Block Diagram
PCI BUS
+ _
B. Block Diagram
Page
C
C. Screw-terminal Board
C. 1 Introduction
C. 2 Features
C. 3 Board Layout
C.4 Pin Assignment
C.5 Single-ended Connections
C.6 Differential Connections
D
D. Register Structure and Format
D.1 Overview
D.2 I/O Port Address Map
80
Table D-1: PCI-1712/1712L register format (Part 1)
81
PCI-1712/1712L Users Manual
Table D-1: PCI-1712/1712L register format (Part 2)
82
Table D-1: PCI-1712/1712L register format (Part 3)
D.3 A/D Single Value Acquisition Write BASE+0
D.4 Channel and A/D data Read BASE + 0
D.5 A/D Channel Range Setting Write BASE+2
D.6 MUX Control Write BASE+4
Page
D.7 A/D Control/Status Register Write/Read BASE+6
Page
D.8 Clear interrupt and FIFO Write BASE+8
D. 9 Interrupt and FIFO status Read BASE+8
D.10 D/A control/status register Write/Read BASE+A
Page
D.11 D/A Channel 0/1 Data Write BASE+C/E
D.12 82C54 Counter Chip 0 Write/Read BASE+10 to 16
D.13 82C54 counter chip 1 Write/Read BASE+18 to 1E
D.14 Counter gate and clock control/status Write/ Read BASE+20 to 26
Page
Page
D.15 Digital I/O registers Write/Read BASE+28
D.16 Digital I/O configuration registers Write/Read BASE+2A
D.17 Calibration command registers Write BASE+2C
Page
D.18 D/A Channel Data for Continuous Output Operation Mode Write BASE+30