APPENDIX D

Example 4

Suppose that the start scan input channel is AI14 and the stop scan input channel is AI3. If AI14 is D, AI0 and AI1 are S, AI2 is D, then the scan sequence is AI14, AI0, AI1, AI2, AI14, AI0, AI1, AI2, AI14, AI0, AI1...

Example 5

Suppose that the start scan input channel is AI11 and the stop scan input channel is AI15. If AI11 is S, AI12 is D, AI14 is D, then the scan sequence is AI11, AI12, AI14, AI11, AI12, AI14, AI11, AI12...

Example 6

Suppose that the start scan input channel is AI4 and the stop scan input channel is AI7. If AI4 is S, AI5 is D, AI6 is D, then the scan sequence is AI4, AI5, AI7, AI4, AI5, AI7, AI4, AI5...

Note

This is an error setting of channel scan sequence, user have to avoid setting even channel as S and odd channel as D.

D.7 A/D Control/Status Register

Write/Read BASE+6

 

 

 

 

 

Table D-6: Register for A/D control/status

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Base Add.

15

14

13

 

12

11

10

9

8

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A/D control register

 

 

 

 

 

 

 

W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AI_T

DM

 

 

 

 

 

 

 

AIO_

AD_

 

AD_

AD_

 

 

 

 

 

A_T

 

 

 

 

 

 

 

 

ADM2

ADM1

ADM0

 

 

RGF

 

 

 

 

 

 

 

CAL

TRE

 

TR

CLK

6

 

CF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A/D status register

 

 

 

 

 

 

 

R

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

AI_T

DMA

 

 

 

 

 

 

 

 

AD_

 

AD_

AD_

ADM2

ADM1

ADM0

 

 

 

 

 

 

 

 

 

 

 

 

 

RGF

_TCF

 

 

 

 

 

 

 

 

TRE

 

TR

CLK

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ADM2 ~ ADM0

 

 

Analog input acquisition mode register

These registers specify the analog input acquisi tion mode.

The following table shows the acquisition mode.

Advantech Co., Ltd.

– 87 –

PCI-1712/1712L User’s Manual

www.advantech.com

 

 

Page 99
Image 99
Konica Minolta PCI-1712L A/D Control/Status Register Write/Read BASE+6, Table D-6 Register for A/D control/status

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