
S Registers 51
S74 V.80 Synchronous Access Mode 
Bits 
■00 Transmit 8 bits SYN. the receiver does not hunt for synchronization sequence.
■01 Transmit 8 bits SYN. the receiver hunt for 8 bits SYN sequence.
■10 Transmit 16 bits SYN. the receiver hunt for 16 bits SYN sequence.
Bit 2. Character transmitted on idle in framed mode
■0 Transmit HDLC flags
■1 Transmit marks
Bit 3. Character transmitted on underrun in framed mode
| ■ | 0 Transmit abort | 
| ■ | 1 Transmit flag | 
| Bit 4. Half duplex option (not used) | |
| Bits  | |
| ■ 00 CRC generation and checking disabled | |
| ■ 01 Use 16 bits CRC | |
| ■ 10 Use 32 bits CRC | |
| ■ | 11 not used | 
| Bit 7. NRZI encoding | |
| 
 | |
| S75 V.80 Synchronization Sequence (first byte). Synchronization sequence used while | |
| in synchronous access mode.When using 16 bits SYN, this register represent the | |
| first 8 bits. Nonstorable. Default is 256 | |
| 
 | |
| S76 V.80 Synchronization Sequence (second byte). Last 8 bits of a 16 bits SYN | |
| sequence. Nonstorable. Default is 256. | |
| 
 | |
| S77 Report period of the nb of octets in rx buffer. Nonstorable. Default is 256. | |
| 
 | |
| S78 Bits  | |
| 00 512 characters | |
| ■ | 10 2048 characters | 
| ■ | 01 1024 characters | 
| ■ 11 Maximum dictionary size characters | |
| Bits  | |
