124 | Appendix A: AMIBIOS POST Checkpoint Codes |
Checkpoint Code | Description |
|
|
37h | The display mode is set. Displaying the power on |
| message next. |
|
|
38h | Initializing the bus input, IPL, general devices next, |
| if present. See page 129 for additional |
| information. |
|
|
39h | Displaying bus initialization error messages. See |
| page 129 for additional information. |
|
|
3Ah | The new cursor position has been read and saved. |
| Displaying the Hit <DEL> message next. |
|
|
3Bh | The Hit <DEL> message is displayed. The protected |
| mode memory test is about to start. |
|
|
40h | Preparing the descriptor tables next. |
|
|
42h | The descriptor tables are prepared. Entering |
| protected mode for the memory test next. |
|
|
43h | Entered protected mode. Enabling interrupts for |
| diagnostics mode next. |
|
|
44h | Interrupts enabled if the diagnostics switch is on. |
| Initializing data to check memory wraparound at |
| 0:0 next. |
|
|
45h | Data initialized. Checking for memory wraparound |
| at 0:0 and finding the total system memory size |
| next. |
|
|
46h | The memory wraparound test is done. Memory size |
| calculation has been done. Writing patterns to test |
| memory next. |
|
|
47h | The memory pattern has been written to extended |
| memory. Writing patterns to the base 640 KB |
| memory next. |
|
|
48h | Patterns written in base memory. Determining the |
| amount of memory below 1 MB next. |
|
|
