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AIMB-210
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96 pages, 2.14 Mb
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AIMB-210 User Manual
Appendix A
Programming the Watchdog Timer
Unlock W83627DHG
Select register of
watchdog timer
Enable the function of
the watchdog timer
Use the function of
Lock W83627DHG
the watchdog timer
Contents
Main
Copyright
Acknowledgements
A Message to the Customer
Declaration of Conformity
Memory Compatibility
Ordering Information
Product Warranty (2 years)
Initial Inspection
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Contents
Chapter 1 General Information ............................1
Chapter 2 Connecting Peripherals ....................13
Chapter 3 BIOS Operation .................................35
Chapter 4 Chipset Software Installation Utility 53
Chapter 5 VGA Setup .........................................57
Chapter 6 LAN Configuration ............................59
Appendix A Programming the Watchdog Timer..61
Appendix B I/O Pin Assignments..........................69
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1.1 Introduction
1.2 Features
1.3 Specifications
1.3.1 System
1.3.2 Memory
1.3.3 Input/Output
1.3.4 Graphics
1.4 Jumpers and Connectors
Table 1.1: Jumpers
Table 1.2: Connectors
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AIMB-210 User Manual 6
1.5 Board layout: Jumper and Connector Locations
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Figure 1.1 Jumper and Connector Location
Figure 1.2 I/O Connectors
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1.7 Safety Precautions
1.8 Jumper Settings
1.8.1 How to Set Jumpers
1.8.2 CMOS Clear (CMOS1)
Table 1.3: CMOS1
1.8.3 COM2 RS 232/422/485 Mode Selector (JSETCOM2)
1.8.4 JLV1/JLV2: LCD Power 3.3 V/5 V Selector
Table 1.4: COM2 RS 232/422/485 Mode Selector (JSETCOM2)
RS232* RS422 RS485
Table 1.5: JLV1/JLV2: LCD Power 3.3 V/5 V Selector
1.8.5 JPSON1: ATX, AT Mode Selector
1 1
1 1
1.8.6 JWDT1: Watchdog Timer Output Option
Table 1.6: JPSON1: ATX, AT Mode Selector
1.9 System Memory
1.10 Memory Installation Procedures
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2.4 USB Ports (LAN1_USB12/LAN2_USB34/USB56/ USB78)
Table 2.1: LAN LED Indicator
2.5 TV-Out Connector (TVOUT1)
Table 2.2: TV-Out Connector (TVOUT1)
2.6 VGA Connector (VGA1)
2.7 Serial Ports (COM1~COM6)
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2.11 Front Panel Connectors (JFP1/JFP2/JFP3)
2.11.5 Power LED and keyboard lock connector (JFP3 / PWR_LED & KEY LOCK)
Table 2.3: ATX power supply LED status (No support for AT power)
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3.1 Introduction
3.2 BIOS Setup
3.2.1 Main Menu
3.2.2 Standard CMOS Features
3.2.3 Advanced BIOS Features
3.2.4 Advanced Chipset Features
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3.2.5 Integrated Peripherals
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3.2.6 USB Device Setting
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3.2.9 Power Management Setup
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3.2.10 PnP/PCI Configurations
3.2.11 PC Health Status
3.2.12 Frequency/Voltage Control
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4.1 Before You Begin
4.2 Introduction
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5.1 Introduction
5.2 Windows Vista/XP/2000
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A.1 Programming the Watchdog Timer
A.1.1 Watchdog Timer Overview
A.1.2 Programming the Watchdog Timer
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Table A.1: Watchdog Timer Registers
A.1.3 Example Program
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B.1 Parallel Port (LPT1)
* Low activity
B.2 USB Header (USB56, USB78)
Table B.1: Parallel Port (LPT1)
Table B.2: USB Header (USB56)
B.3 VGA Connector (VGA1)
B.4 RS-232 Interface
Table B.3: VGA Connector (VGA1)
Table B.4: RS-232 Interface (COM1~COM4)
B.5 RS-232/422/485 Setting Interface (JETCOM2)
B.6 SPI_CN1: SPI Fresh Card Pin Connector
B.7 PS/2 Keyboard and Mouse Connector (KBMS1)
B.8 CPU Fan Power Connector (CPU_FAN1)
Table B.7: PS/2 Keyboard and Mouse Connector (KBMS1)
Table B.8: CPU Fan Power Connector (CPU_FAN1)
B.9 System Fan Power Connector (CHA_FAN1)
B.10 Power LED & Keyboard Lock Connector (JFP3)
Table B.9: System Fan Power Connector (SYSFAN1/SYSFAN2)
Table B.10: Power LED & Keyboard Lock Connector (JFP3)
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B.13 ATX Power Connector (EATXPWR1)
B.14 USB/LAN ports (LAN1_USB12/LAN2_USB34)
Table B.13: ATX Power Connector (ATX2)
Table B.14: USB Port
Table B.15: Ethernet 10/100 Mbps RJ-45 Port
B.15 Line In, Line Out, Mic In Connector (AUDIO1)
B.16 Serial ATA0/1 (SATA1/SATA2)
B.18 AC-97 Audio Interface (FPAUD1)
B.17 AT/ATX Mode (PSON1)
Table B.16: Serial ATA 0/1 (SATA1/SATA2)
B.19 GPIO Pin Header (GPIO1)
Table B.19: AT/ATX Mode (PSON1)
B.20 LVDS Connector: LVDS1 & LVDS2 (Optional)
Table B.20: LVDS1 Connector (Optional)
B.21 LVDS Power Jumper (JLV1, JLV2)
* default setting
Table B.21: LVDS2 Connector (Optional)
Table B.22: LVDS Power Jumper
B.22 LVDS Invert: INV1 & INV2 (Optional)
B.23 System I/O Ports
Table B.23: LVDS Power Jumper
Table B.24: System I/O Ports
B.24 DMA Channel Assignments
B.25 Interrupt Assignments
B.26 1st MB Memory Map
Table B.25: DMA Channel Assignments
Table B.26: Interrupt Assignments
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