Block Diagram | Advantech PCM-3780 specification

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APPENDIX B

Block Diagram

This chapter provides information on the block diagram for PCM-3780.

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Advantech PCM-3780 manual Block Diagram

Contents

PCM-3780 Ch Counter/Timer with Ch TTL DIO Module Copyright Acknowledgements Two Years Product Warranty CE Notification FCC Class a Technical Support and Assistance Packing List Page Contents Appendix Specifications Introduction Features Counter Modes PCM-3780 Counter Mode PCM-3780 Counter Mode Applications Installation Guide Installation Flow Chart Device Drivers on the companion CD-ROM Software OverviewDevice Drivers Register-level Programming Programming Tools Device Drivers Programming Roadmap Programming with Device Drivers Function Library Troubleshooting Device Drivers Error Wiring Cables AccessoriesWiring Boards Hardware Installation Unpacking Companion CD-ROM Driver Installation Different Options for Driver Setup Installing the Module Hardware InstallationPage Pin Assignments & Jumper Settings Overview Signal Connections Interrupt Level IRQ Setting JP1 Switch and Jumper Settings Base Address Setting Base Address Setting SW1 CN3 I/O Port Connector Connectors Pin AssignmentCN4 Counter Interface Connector Reference Direction Description Connector Signal Description Using Direct I/O Using Advantech 32-bit DLL DriverPeriod Measurement Frequency Measurement Frequency Measurement Specifications Digital Input/Output Programmable Counter General Page Block Diagram Appendix B Block Diagram Register Structure & Format I/O Port Address Map Appendix C Register Structure & Format Table C.1 Register Offset Address Table Register Format CE CE CM2 Output Enable Control Counter 0/1 Mode RegisterCM1 to CM0 Output Control CM6 to CM3 Count Control CM6 CM13 to CM12 Gate Source Selection CM7 Count Source EdgeCM14 Gating Polarity Selection CM15 Gate Active Edge or Level Counter 0/1 Hold Register Counter 0/1 Load Register Counter Command Enable Register Counter 0/1 Command RegisterC2 to C0 Command Code CE1 to CE0 Counter Command Enable Bit Interrupt Status Register Interrupt Control Register Direction Control Register Interrupt Clear RegisterPort A/B/C Interrupt Status Register O Direction Control Bit DV3 to DV0 Fout Divider Divide by 1 to 16 0000 = Divide by Fout Register FS2 to FS0 Fout Source FOE Fout Output Enable Waveform of Each Mode Counter Mode Descriptions Appendix D Waveform of Each Mode Table D.1 PCM-3780 Counter Mode Table D.2 PCM-3780 Counter Mode Software-Triggered Strobe with No Hardware Gating Mode a Waveforms Software-Triggered Strobe with Level Gating Mode B Waveforms Hardware-Triggered Strobe Mode C Waveforms Rate Generator with No Hardware Gating Mode D Waveforms Rate Generator with Level Gating Mode E Waveforms Non-Retriggerable One-Shot Mode F Waveforms Software-Triggered Delayed Pulse One-Shot Mode G Waveforms Mode H Waveforms Hardware-Triggered Delayed Pulse Strobe Mode I Waveforms Variable Duty Cycle Rate Generator with No Hardware Gating Mode J Waveforms Variable Duty Cycle Rate Generator with Level Gating Mode K Waveforms Hardware-Triggered Delayed Pulse One-Shot Mode L Waveforms Hardware-Triggered Strobe with Edge Disarm Mode O Waveforms Non-Retriggerbale One-Shot with Edge Disarm Mode R Waveforms Hardware-Triggered Delayed Pulse Strobe with Edge Disarm Mode U Waveforms Hardware-Triggered Delayed Pulse One-Shot with Edge Disarm Mode X Waveforms